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Memory Systems: Cache, DRAM, Disk

Jacob, Bruce, Wang, David, Ng, Spencer 2007

Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem.

The book tells you everything you need to know about the logical design and operation, physical design and operation, performance characteristics and resulting design trade-offs, and the energy consumption of modern memory hierarchies. You learn how to to tackle the challenging optimization problems that result from the side-effects that can appear at any point in the entire hierarchy.

As a result you will be able to design and emulate the entire memory hierarchy.

. Understand all levels of the system hierarchy -Xcache, DRAM, and disk.
. Evaluate the system-level effects of all design choices.
. Model performance and energy consumption for each component in the memory hierarchy.


Why Read This Book

You should read this book if you need a single, thorough reference that explains how caches, DRAM devices, memory controllers and disks behave and interact — and how those interactions drive performance and energy trade-offs. It gives you the vocabulary, analytic techniques, and practical design guidance to model, evaluate, and improve real memory hierarchies.

Who Will Benefit

FPGA designers, hardware engineers and system architects who must design or tune memory interfaces, controllers or system-level data paths for high-performance or energy-constrained systems.

Level: Advanced — Prerequisites: Solid background in digital logic and computer architecture fundamentals (caches, pipelining, virtual memory) and basic familiarity with probability/performance analysis; programming/simulation experience is helpful.

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Key Takeaways

  • Analyze cache hierarchies and quantify miss types, miss rates and their system-level performance impact
  • Design and evaluate DRAM systems and controllers, including timing, banks, ranks and command scheduling
  • Model and simulate end-to-end memory system performance using trace-driven techniques
  • Apply cache optimization techniques (replacement, prefetching, associativity, write policies) to real workloads
  • Optimize memory subsystem energy/performance trade-offs and understand their effect on overall system throughput
  • Understand disk/storage interactions and the role of virtual memory and OS-level policies on memory performance

Topics Covered

  1. 1. Introduction: The Memory Hierarchy and Motivation
  2. 2. Cache Basics: Organization and Operation
  3. 3. Cache Performance: Misses, Hits, and Policies
  4. 4. Virtual Memory, TLBs and OS Interactions
  5. 5. DRAM Fundamentals: Device and Chip Organization
  6. 6. DRAM Systems: Banks, Ranks, Timing and Protocols (SDR/DDR era)
  7. 7. Memory Controllers and Scheduling Policies
  8. 8. Multiprocessor and Shared-Memory Issues
  9. 9. Disk and Secondary Storage: Mechanics and Performance
  10. 10. Performance Modeling and Trace-driven Simulation
  11. 11. Energy and Power Considerations in Memory Systems
  12. 12. Design Trade-offs, Case Studies and Optimization Techniques

Languages, Platforms & Tools

DRAM (SDR, DDR, DDR2-era concepts)DRAM modules and memory controller architecturesDisk/HDD subsystems (conceptual)Cache hierarchies and processor interfaces (general)Trace-driven simulation and analytical performance models (techniques rather than vendor tools)Workload/benchmarks for memory evaluation

How It Compares

Covers the memory-specific depth that Hennessy & Patterson's Computer Architecture introduces more broadly — Jacob goes deeper into DRAM internals, controller scheduling and disk interactions than most general architecture texts.

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