Work on FPGAs (generally in Verilog), but still a little green in that area (have a digital background, but mostly doing microcontrollers).

Re: Best method for a large dot vector

Reply posted 6 years ago (03/04/2016)
Thank you for all the info @matthewbarr.  I am always looking to improve the way I do things, so I appreciate the feedback.  Is there some code online somewhere...

Re: Best method for a large dot vector

Reply posted 6 years ago (03/04/2016)
I think I am missing something here, let me make sure I got it.  Does something like this make sense:always>@(posedge clock)begin case(sel) begin ...

Re: Best method for a large dot vector

Reply posted 6 years ago (03/04/2016)
Good points @cfelton.  It is a snippet I put in there, but a link to the full code would probably have been smart.My clock rate is 184.32MHz and my sample rate...

Re: Best method for a large dot vector

Reply posted 6 years ago (03/04/2016)
Thanks so much.  Also, is there a way to wrap the code so that the forum knows that it was code?  I had a heck of a time formating it, and it still looks rather...

Best method for a large dot vector

New thread started 6 years ago
I am trying to compute a 274 sample dot vector in an FPGA (in #Verilog).  I have the clock cycles to compute it over many clocks, but I am having trouble meeting...

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