Computer Arithmetic and Verilog HDL Fundamentals
Verilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction.
Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International’s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities.
Introducing the three main modeling methods―dataflow, behavioral, and structural―this self-contained tutorial―
- Covers the number systems of different radices, such as octal, decimal, hexadecimal, and binary-coded variations
- Reviews logic design fundamentals, including Boolean algebra and minimization techniques for switching functions
- Presents basic methods for fixed-point addition, subtraction, multiplication, and division, including the use of decimals in all four operations
- Addresses floating-point addition and subtraction with several numerical examples and flowcharts that graphically illustrate steps required for true addition and subtraction for floating-point operands
- Demonstrates floating-point division, including the generation of a zero-biased exponent
Designed for electrical and computer engineers and computer scientists, this book leaves nothing unfinished, carrying design examples through to completion. The goal is practical proficiency. To this end, each chapter includes problems of varying complexity to be designed by the reader.
Why Read This Book
You will learn how to translate numerical theory into synthesizable Verilog so you can build and verify fixed-point, decimal, and floating-point arithmetic units that map efficiently to real hardware. The book combines clear explanations of computer arithmetic with practical Verilog examples and simulation workflows (using Silvaco’s SILOS) so you can move from algorithm to RTL and testbench with confidence.
Who Will Benefit
Engineers and senior students who design arithmetic-heavy digital systems—FPGA/ASIC designers, DSP implementers, and verification engineers—looking to master arithmetic representations and implement them in Verilog.
Level: Intermediate — Prerequisites: Basic digital logic (gates, registers, combinational vs sequential logic), binary number systems and elementary arithmetic, and some familiarity with HDL concepts or RTL design.
Key Takeaways
- Implement fixed-point, decimal, and IEEE-754 floating-point representations in synthesizable Verilog.
- Design and optimize core arithmetic blocks (adders, subtractors, multipliers, dividers) and apply algorithms like Booth encoding and Wallace trees.
- Create pipelined and sequential arithmetic units suitable for FPGA and ASIC implementation and understand resource/performance tradeoffs.
- Write effective Verilog testbenches and use SILOS simulation techniques to verify arithmetic correctness and corner cases.
- Map arithmetic designs to FPGA-oriented resources and DSP blocks while considering latency, throughput, and area.
- Analyze numerical errors, rounding modes, and overflow/underflow behavior and apply techniques to control or mitigate them.
Topics Covered
- 1. Introduction to Verilog HDL and Modeling Styles
- 2. Number Systems and Binary Representations
- 3. Fixed-Point Arithmetic: Formats and Implementation
- 4. Decimal and BCD Arithmetic Techniques
- 5. Floating-Point Representations and IEEE-754 Fundamentals
- 6. Adders and Subtractors: Architectures and Optimizations
- 7. Multipliers, Booth Encoding, and Partial-Product Reduction
- 8. Division Algorithms and Square-Root Methods
- 9. Sequential Arithmetic Units and Pipelining Strategies
- 10. Rounding, Normalization, and Exception Handling
- 11. Verification: Testbenches, Corner Cases, and SILOS Simulation
- 12. Practical Implementation Notes for FPGAs and DSP Blocks
- 13. Case Studies and Complete Verilog Examples
- 14. Appendices: Verilog Reference and Simulation Best Practices
Languages, Platforms & Tools
How It Compares
More focused on practical arithmetic and Verilog implementation than Behrooz Parhami's theoretical "Computer Arithmetic," and more arithmetic-centric than Samir Palnitkar's general "Verilog HDL" tutorial.
