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Aligning symbols with IDELAY / ISERDES in Xilinx 7-series devices.

Started by Mike Field July 14, 2015
Hi,

I'm working in Artix-7 and I've got a workable way to adjust the bitslip and IDELAY tap settings to lock onto an incoming TMDS encoded stream, but is there a better way?

Currently I count the symbol error rate on the link, and if the rate of bad symbols is greater than 1:2^20 I then move on to a higher delay tap setting. 

If the delay's tap setting wraps I also assert bitslip input on on the ISERDES for a cycle, allowing me to try a different alignment.

It works well enough in practice but seems ungainly, and has a few problems lurking under the covers - if the error rate is very close to 1:2^32 it will never lock, and a second problem is that it might decide to stick with an IDELAY that is marginal (e.g. has errors but less than one in a million), without discovering that a better setting could be one tap away. 

And not so much a problem for video but if it does get errors it can take a while to come back into sync (7M symbols or so)

The 7-series I/O Resource User Guide is very good at telling you what is there for you to use,  but not how best to do it - any suggests would be gratefully accepted!

Mike

PS. Code is at http://hamsterworks.co.nz/mediawiki/index.php/SERDES_symbol_locking if you want a look at it.


Hi Mike,

I always use 2 independent types of alignment: Bit- and Word alignment.

In first case I ensure that I sample the data as close as possible in 
the middle of the data eye. This can be performed by example of using 2 
delays for one data lane with an variable offset between them.

Lets say you have a M-delay and a S-Delay for your data lane (for 
example you can use IBUFDS_DIFF_OUT buffers on Artix 7 devices when 
using LVDS). M is at step n and S will be oscillated about amount of 
shifts, lets say 2 (this depends on the tap width and the width of the 
open data eye). So S will have the tap values n+2 -> n-2 -> n+2 -> n-2 
and so on. Now you compare your data between M and S. When they are 
equal you sample in the middle of the data eye and everything is fine. 
When not you have to tap M in the opposite direction until the data is 
equal.

I like this technique, because the bit alignment is performed in real 
time, which ensures that the link is up in every case (for example 
voltage or temperature can change).

When this works you have the most technical part of alignment done. To 
implement word alignment, you have to know some known symbols in your 
data stream. When you find them, everything is good, when not you have 
to perform bitslips until you get them.

Nice regards,
Tobias