Forums

PicoBlaze implementation

Started by Martin December 28, 2004
I've a general question regarding PicoBlaze IP core from Xilinx:
If I'm using PicoBlaze as a controller on my design: Who programs the
FPGA which contains PicoBlaze?
Normally e.g. a uP loads the FPGA with the neccesary configuration
file. But if
the FPGA itselfs is the controller (e.g. PicoBlaze), how do I get the
configuration file into the FPGA?
Silly question, isn't it?

Thanks for your help
Martin
Martin wrote:
> I've a general question regarding PicoBlaze IP core from Xilinx: > If I'm using PicoBlaze as a controller on my design: Who programs the > FPGA which contains PicoBlaze? > Normally e.g. a uP loads the FPGA with the neccesary configuration > file. But if > the FPGA itselfs is the controller (e.g. PicoBlaze), how do I get the > configuration file into the FPGA? > Silly question, isn't it? > > Thanks for your help > Martin
You can use a xilinx PROM that the FPGA will read on power-up.
Hi Martin,
The picoblaze compiler take your code (psm file) and uses it to create
a vhdl component. then, you instantiate that component in your vhdl
design and synthesize it as it was a regular block. afterwards you
generate a bit file and download it to your FPGA as usual (either
directly or using a configuration prom).

Reagrds, Moti.