The Xilinx, Altera/Intel and the mainline Lattice devices all support RAM blocks in widths of multiples of 9 bits. Some other devices only have RAM widths of multiples of 8 bits or less. Does this make much of a difference to you? Do you use the 9 bit widths in your designs? Rick C.

# 8 bits vs. 9 bits in RAM Blocks

Am 29.06.2018 um 22:22 schrieb gnuarm.deletethisbit@gmail.com:> > Does this make much of a difference to you? Do you use the 9 bit widths in yourdesigns?>Yes, 9 bit width RAM is very interesting in video processing. When you have RGB data with 12 bit each, then you can use 4x9 bit RAM for storing the 36 bit video data exactly, without wasting any ressources. Sometimes the additional bit is very helpful when dealing with "traditional" 8 bit data and needed an additional parity bit. -- Viele Grüße, Tobi https://www.elpra.de

On 29/06/2018 21:22, gnuarm.deletethisbit@gmail.com wrote:> The Xilinx, Altera/Intel and the mainline Lattice devices all support RAM blocksin widths of multiples of 9 bits. Some other devices only have RAM widths of multiples of 8 bits or less.> > Does this make much of a difference to you? Do you use the 9 bit widths in yourdesigns?> > Rick C. >I've made use of the extra bits for meta data: For example, in a complicated buffering system for gigabit Ethernet I move data around the chip as 32 bit words stored in 36 bit wide registers (4 x9). The extra 4 bits are used to say if this is the last 32 bit word in a message, how many bytes in the word are valid (always all 4 unless its the last word), and the last bit can invalidate the whole message. I'd miss the extra bits if they weren't available. MK

On Friday, June 29, 2018 at 11:22:52 PM UTC+3, gnuarm.del...@gmail.com wrote:> The Xilinx, Altera/Intel and the mainline Lattice devices all support RAM blocksin widths of multiples of 9 bits. Some other devices only have RAM widths of multiples of 8 bits or less.> > Does this make much of a difference to you? Do you use the 9 bit widths in yourdesigns?> > Rick C.FYI, the only Altera series from "recommended for new designs" list that have RAM blocks in multiples of 9 bits are "CPLD-replacement" MAX10 and decade-old Cyclone10LP. Cyclone5, Arria5, Stratix5, Arria10/Cyclone10GX and Stratix10 all has embedded RAM blocks in multiples of 10 bits.

On Wednesday, July 4, 2018 at 5:45:22 AM UTC-4, already...@yahoo.com wrote:> On Friday, June 29, 2018 at 11:22:52 PM UTC+3, gnuarm.del...@gmail.com wrote: > > The Xilinx, Altera/Intel and the mainline Lattice devices all support RAM blocksin widths of multiples of 9 bits. Some other devices only have RAM widths of multiples of 8 bits or less.> > > > Does this make much of a difference to you? Do you use the 9 bit widths in yourdesigns?> > > > Rick C. > > FYI, the only Altera series from "recommended for new designs" list that have RAMblocks in multiples of 9 bits are "CPLD-replacement" MAX10 and decade-old Cyclone10LP.> Cyclone5, Arria5, Stratix5, Arria10/Cyclone10GX and Stratix10 all has embedded RAMblocks in multiples of 10 bits. I didn't know that. Hmmm... that could be very useful. Rick C.

On Wednesday, July 4, 2018 at 5:45:22 AM UTC-4, already...@yahoo.com wrote:> On Friday, June 29, 2018 at 11:22:52 PM UTC+3, gnuarm.del...@gmail.com wrote: > > The Xilinx, Altera/Intel and the mainline Lattice devices all support RAM blocksin widths of multiples of 9 bits. Some other devices only have RAM widths of multiples of 8 bits or less.> > > > Does this make much of a difference to you? Do you use the 9 bit widths in yourdesigns?> > > > Rick C. > > FYI, the only Altera series from "recommended for new designs" list that have RAMblocks in multiples of 9 bits are "CPLD-replacement" MAX10 and decade-old Cyclone10LP.> Cyclone5, Arria5, Stratix5, Arria10/Cyclone10GX and Stratix10 all has embedded RAMblocks in multiples of 10 bits. I didn't know that. Hmmm... that could be very useful. Rick C.