ModelSim Designer

Kim Enkovaara wrote:

> Actually HDL designer creates quite clean code from the FSM editor
> and block diagrams. It can easily be read also manually. The
> problem is lack of comments in the code if it is automatically
> generated tough.

Yes, and once I add a comment, the graphical tool
is out of the source control loop.

>> A single block HDL style allows the bottom up
>> use of variable (register) structures, functions and procedures
>> to construct a design of arbitrary complexity
>> from a standard template. 

> Just be wary with functions and procedures. Especially
> procedures seem to be a big problem still for design tools. I think
> I have seen all the major implementation tools to create garbage or crash
> with very simple procedures (DC, Synplify, FormalPro, Formality, few 
> linters etc.)

If you have access to any of those tools, would you mind
running my reference design through and see how it does?

  http://home.comcast.net/~mike_treseler/uart.vhd

>> For designers who know an HDL for synthesis and simulation,
>> tools like HDL designer are largely irrelevant.
> 
> Actually what I have seen very experienced VHDL coders (10+ years) also
> like HDL designer. They usually use only the block diagrams and
> text views. Block diagrams are good way of documenting
> the functionality.

I agree that HDL designer is a fine browser.
My point to the OP was that it is not necessary
for design entry and that there are more
economic ways to get this design browser function.

          -- Mike Treseler