Wide frequency range, arbitrary waveform DDS

On Thursday, August 18, 2022 at 4:37:03 AM UTC-4, Stef wrote:
> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:=20
> > On Wednesday, August 17, 2022 at 7:36:42 AM UTC-4, Stef wrote:=20
> >> On 2022-08-17 gnuarm.del...@gmail.com wrote in comp.arch.fpga:=20
> >> > On Tuesday, August 16, 2022 at 11:37:41 AM UTC-4, Stef wrote:
> <snip>
> >> >> But al of the DDS chips I find from Analog seem only to implement a=
=20
> >> >> fixed sine table/function. Do DDS chips exist that allow downloadin=
g an=20
> >> >> arbitrary lookup table with 2^10 - 2^16 entries of 10 - 16 bit each=
?
> 'Hidden' AWG hint.
> >> > If you are looking to generate a non-sine waveform, it is not needed=
, or useful.=20
> >> Could you explain this? How would I generate an arbitrary waveform=20
> >> without using a table?=20
> >=20
> > It's not without a table, but not one huge table, 2^n length where n is=
 the number of phase bits. I described the process below.=20
> >=20
> >=20
> >> >> If no such standard chips exist, I expect I need to implement the D=
DS=20
> >> >> in an FPGA. Using a smaller accumulator would probably save some sp=
ace=20
> >> >> in the FPGA. Or am I just optoimizing prematurely?=20
> >> >=20
> >> > Do you work at Highland Technology?=20
> >> No, I do not.=20
> >=20
> > Ok, someone there was inquiring about the exact same thing and often ha=
s one of his people enquire about such problems here when they potentially =
involve FPGAs. Sorry I mistook you for that.
> I suspected something like this was the case, no problem. :-)
> >=20
> >> > I've posted about an appropriate solution more than once in s.e.d. H=
ere is a fair summary...=20
> >> >=20
> >> I don't read there, so missed that. But are you now talking about an=
=20
> >> appropriate solution for a specific Highland Technology problem, or a=
=20
> >> general solution?=20
> >=20
> > The DDS is general. A single sine table is fine if you have the memory =
for it. But you can do very well with numerical methods and much smaller ta=
bles as well.
> Yes DDS is general. But your method seemed to be aimed specifically at a=
=20
> certain problem. But if I understand you correctly, the method you=20
> describe is a general solution to generate sine waves without large=20
> tables?=20

Yes, only sine waves.  If you need an AGW, you need a large table, unless t=
he waveform can be described mathematically in ways that can be synthesized=
 in logic.  Like combinations of sawtooth, triangle, sine, pulses, etc.  Th=
at can be done with counters and added together. =20


> > Ok, if you need an AWG, then you need a large memory. Your original pos=
t didn't seem to mention that. It only talked about sine waves.
> Re-reading my original post, I see that was a bit hidden in the text and=
=20
> may not have been clear to a reader not familiar with the application.=20
> Sorry about that.

You can combine the table with logic to produce a "sparse" waveform.  Such =
as a burst of arbitrary data, followed by no signal or some base signal tha=
t can be easily synthesized, followed by another burst of arbitrary data.  =
There's no limit to the combinations you might think of to suit a given pro=
blem. =20

--=20

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209

On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:

> You keep calling it a DDS, which apparently is correct in that it can be used generically.  But conventionally this refers to generating a sine wave.  The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing. 

To me, the core of the DDS is the clock/phase accumulator/control word.
The phase output of this can be fed to any phase to amplitude conversion
you like. Complete DDS chips often include sine (table), sawtooth
(direct phase to DAC) and pulse (MSB of phase).

Although not an authoritive source, wikipedia agrees with this
interpretation.
https://en.wikipedia.org/wiki/Direct_digital_synthesis

AWG, to me, just means you can generate any waveform. But not how you
set the frequency of this waveform. It can be fixed or just use divide
by 2 stages on the clock, or wathever.

But this is all just personal interpretations, I think we both
understand what the other means right now. Maybe we should call it an
DDS AWG generator to cover everything. ;-)


-- 
Stef

The party adjourned to a hot tub, yes.  Fully clothed, I might add.
		-- IBM employee, testifying in California State Supreme Court

On Friday, August 19, 2022 at 5:13:11 AM UTC-4, Stef wrote:
> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
> > You keep calling it a DDS, which apparently is correct in that it can be used generically. But conventionally this refers to generating a sine wave. The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing.
> To me, the core of the DDS is the clock/phase accumulator/control word. 
> The phase output of this can be fed to any phase to amplitude conversion 
> you like. Complete DDS chips often include sine (table), sawtooth 
> (direct phase to DAC) and pulse (MSB of phase). 
> 
> Although not an authoritive source, wikipedia agrees with this 
> interpretation. 
> https://en.wikipedia.org/wiki/Direct_digital_synthesis 
> 
> AWG, to me, just means you can generate any waveform. But not how you 
> set the frequency of this waveform. It can be fixed or just use divide 
> by 2 stages on the clock, or wathever. 
> 
> But this is all just personal interpretations, I think we both 
> understand what the other means right now. Maybe we should call it an 
> DDS AWG generator to cover everything. ;-) 

Sorry, I didn't mean to make a big deal of the nomenclature.  So what are you trying to do that isn't obvious, given a phase accumulator and a lookup table?  

The frequency is normally set by the increment on the phase accumulator.   But maybe that doesn't work so well for an AWG?  What sort of waveforms are you interested in generating? 

-- 

Rick C.

--- Get 1,000 miles of free Supercharging
--- Tesla referral code - https://ts.la/richard11209 

On Friday, August 19, 2022 at 5:13:11 AM UTC-4, Stef wrote:
> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
> > You keep calling it a DDS, which apparently is correct in that it can be used generically. But conventionally this refers to generating a sine wave. The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing.
> To me, the core of the DDS is the clock/phase accumulator/control word. 
> The phase output of this can be fed to any phase to amplitude conversion 
> you like. Complete DDS chips often include sine (table), sawtooth 
> (direct phase to DAC) and pulse (MSB of phase). 
> 
> Although not an authoritive source, wikipedia agrees with this 
> interpretation. 
> https://en.wikipedia.org/wiki/Direct_digital_synthesis 
> 
> AWG, to me, just means you can generate any waveform. But not how you 
> set the frequency of this waveform. It can be fixed or just use divide 
> by 2 stages on the clock, or wathever. 
> 
> But this is all just personal interpretations, I think we both 
> understand what the other means right now. Maybe we should call it an 
> DDS AWG generator to cover everything. ;-) 

I suppose to control the sample rate of the AGW, you could use a DDS with a clock output.  The DDS would give a wide range of frequency with high resolution.  What range of sample rate are you interested in? 

-- 

Rick C.

--+ Get 1,000 miles of free Supercharging
--+ Tesla referral code - https://ts.la/richard11209 

On 2022-08-19 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
> On Friday, August 19, 2022 at 5:13:11 AM UTC-4, Stef wrote:
>> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
>> > You keep calling it a DDS, which apparently is correct in that it can be used generically. But conventionally this refers to generating a sine wave. The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing.
>> To me, the core of the DDS is the clock/phase accumulator/control word. 
>> The phase output of this can be fed to any phase to amplitude conversion 
>> you like. Complete DDS chips often include sine (table), sawtooth 
>> (direct phase to DAC) and pulse (MSB of phase). 
>> 
>> Although not an authoritive source, wikipedia agrees with this 
>> interpretation. 
>> https://en.wikipedia.org/wiki/Direct_digital_synthesis 
>> 
>> AWG, to me, just means you can generate any waveform. But not how you 
>> set the frequency of this waveform. It can be fixed or just use divide 
>> by 2 stages on the clock, or wathever. 
>> 
>> But this is all just personal interpretations, I think we both 
>> understand what the other means right now. Maybe we should call it an 
>> DDS AWG generator to cover everything. ;-) 
>
> Sorry, I didn't mean to make a big deal of the nomenclature.  So what are you trying to do that isn't obvious, given a phase accumulator and a lookup table?  
>
I think it is obvious. Phase accumulator points to LUT, but LUT isn't a
sine table but sommething else.

> The frequency is normally set by the increment on the phase accumulator.   But maybe that doesn't work so well for an AWG?  What sort of waveforms are you interested in generating? 
>
This is the DDS part (as I interpret it) and this is what I intend to
do. I see no reason why this would not work for AWG. Except when you get
to higher frequencies, you start losing your waveform, until it degrades
to a sine at FS/2 (providing the output filter is correct).

For now, I need to accomodate 'anything you can draw'. So a full phase
to amplitude LUT is required. Length and width TBD.


-- 
Stef

Don't read any sky-writing for the next two weeks.

On 8/19/22 6:45 AM, Stef wrote:
> On 2022-08-19 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
>> On Friday, August 19, 2022 at 5:13:11 AM UTC-4, Stef wrote:
>>> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
>>>> You keep calling it a DDS, which apparently is correct in that it can be used generically. But conventionally this refers to generating a sine wave. The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing.
>>> To me, the core of the DDS is the clock/phase accumulator/control word.
>>> The phase output of this can be fed to any phase to amplitude conversion
>>> you like. Complete DDS chips often include sine (table), sawtooth
>>> (direct phase to DAC) and pulse (MSB of phase).
>>>
>>> Although not an authoritive source, wikipedia agrees with this
>>> interpretation.
>>> https://en.wikipedia.org/wiki/Direct_digital_synthesis
>>>
>>> AWG, to me, just means you can generate any waveform. But not how you
>>> set the frequency of this waveform. It can be fixed or just use divide
>>> by 2 stages on the clock, or wathever.
>>>
>>> But this is all just personal interpretations, I think we both
>>> understand what the other means right now. Maybe we should call it an
>>> DDS AWG generator to cover everything. ;-)
>>
>> Sorry, I didn't mean to make a big deal of the nomenclature.  So what are you trying to do that isn't obvious, given a phase accumulator and a lookup table?
>>
> I think it is obvious. Phase accumulator points to LUT, but LUT isn't a
> sine table but sommething else.
> 
>> The frequency is normally set by the increment on the phase accumulator.   But maybe that doesn't work so well for an AWG?  What sort of waveforms are you interested in generating?
>>
> This is the DDS part (as I interpret it) and this is what I intend to
> do. I see no reason why this would not work for AWG. Except when you get
> to higher frequencies, you start losing your waveform, until it degrades
> to a sine at FS/2 (providing the output filter is correct).
> 
> For now, I need to accomodate 'anything you can draw'. So a full phase
> to amplitude LUT is required. Length and width TBD.
> 
> 

Normally for a Arbitrary Waveform, the phase increment is limited to no 
more that one LUT entry per clock cycle, and if there aren't an integral 
number of increments per phase increment of one LUT entry, you want 
there to be a moderate number to avoid "distortion" of the waveform.

And you need to decide how the "Arbitrary" waveform is shaped between 
points, normally either step held or lineally interpreted.

On Friday, August 19, 2022 at 6:45:53 AM UTC-4, Stef wrote:
> On 2022-08-19 gnuarm.del...@gmail.com wrote in comp.arch.fpga: 
> > On Friday, August 19, 2022 at 5:13:11 AM UTC-4, Stef wrote: 
> >> On 2022-08-18 gnuarm.del...@gmail.com wrote in comp.arch.fpga: 
> >> > You keep calling it a DDS, which apparently is correct in that it can be used generically. But conventionally this refers to generating a sine wave. The term, AWG (Arbitrary Waveform Generator) is more commonly used for what you are doing. 
> >> To me, the core of the DDS is the clock/phase accumulator/control word. 
> >> The phase output of this can be fed to any phase to amplitude conversion 
> >> you like. Complete DDS chips often include sine (table), sawtooth 
> >> (direct phase to DAC) and pulse (MSB of phase). 
> >> 
> >> Although not an authoritive source, wikipedia agrees with this 
> >> interpretation. 
> >> https://en.wikipedia.org/wiki/Direct_digital_synthesis 
> >> 
> >> AWG, to me, just means you can generate any waveform. But not how you 
> >> set the frequency of this waveform. It can be fixed or just use divide 
> >> by 2 stages on the clock, or wathever. 
> >> 
> >> But this is all just personal interpretations, I think we both 
> >> understand what the other means right now. Maybe we should call it an 
> >> DDS AWG generator to cover everything. ;-) 
> > 
> > Sorry, I didn't mean to make a big deal of the nomenclature. So what are you trying to do that isn't obvious, given a phase accumulator and a lookup table? 
> >
> I think it is obvious. Phase accumulator points to LUT, but LUT isn't a 
> sine table but sommething else.

Yes, it is obvious.  That's why I'm asking what you are looking for from this discussion. 


> > The frequency is normally set by the increment on the phase accumulator. But maybe that doesn't work so well for an AWG? What sort of waveforms are you interested in generating? 
> >
> This is the DDS part (as I interpret it) and this is what I intend to 
> do. I see no reason why this would not work for AWG. Except when you get 
> to higher frequencies, you start losing your waveform, until it degrades 
> to a sine at FS/2 (providing the output filter is correct). 

I'm not following what you are saying about your filter.  It only needs to filter artifacts above the Nyquist rate of fs/2.  It would not need to distort your waveform.  


> For now, I need to accomodate 'anything you can draw'. So a full phase 
> to amplitude LUT is required. Length and width TBD. 

Yes, if you want "anything you can draw", you need the LUT.  But many waveforms can be constructed from simple shapes which can be generated digitally.  The LUT won't be able to use the folding techniques that work for sine waves.  

I don't know what your requirements are, but you can buy low cost AWG board level products and small box level products.  

-- 

Rick C.

-+- Get 1,000 miles of free Supercharging
-+- Tesla referral code - https://ts.la/richard11209 

On 2022-08-20 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
> On Friday, August 19, 2022 at 6:45:53 AM UTC-4, Stef wrote:

...

>> I think it is obvious. Phase accumulator points to LUT, but LUT isn't a 
>> sine table but sommething else.
>
> Yes, it is obvious.  That's why I'm asking what you are looking for from this discussion. 

In my original post, I had 2 questions

1) Are there objections to using a prescaler and a shorter phase
accumulator for generating frequencies over a wide range?

This has been discussed. Conclusions is that you should keep the
accumulator as long as possible for best performance.


2) Are the complete DDS chips available that have a downloadable LUT,
instead of the standard sine table?

If such chips are available, I may not have to develop a custom
(FPGA/CPU/DSP) solution. This question has not been answered and I have
found non myself sofar.

...


> I don't know what your requirements are, but you can buy low cost AWG board level products and small box level products.  


At this time there are only general requirements (AWG, 12MHz BW, ...).
If the project continues, this will be detailed further.

Do you have an example of such a board level product? If it can do what
will be required, it is certainly an option.


-- 
Stef

If everything seems to be going well, you have obviously overlooked something.

On Monday, August 22, 2022 at 4:24:41 AM UTC-4, Stef wrote:
> On 2022-08-20 gnuarm.del...@gmail.com wrote in comp.arch.fpga: 
> > On Friday, August 19, 2022 at 6:45:53 AM UTC-4, Stef wrote:
> ...
> >> I think it is obvious. Phase accumulator points to LUT, but LUT isn't a 
> >> sine table but sommething else. 
> > 
> > Yes, it is obvious. That's why I'm asking what you are looking for from this discussion.
> In my original post, I had 2 questions 
> 
> 1) Are there objections to using a prescaler and a shorter phase 
> accumulator for generating frequencies over a wide range? 
> 
> This has been discussed. Conclusions is that you should keep the 
> accumulator as long as possible for best performance. 

If any of that is from my comments, I retract them.  I was thinking of a typical DDS generating a sine wave. 

You only need the clock rate to suit the waveform you are generating, such as Nyquist considerations.  Your memory is finite, so you have a fundamental trade off between clock rate and duration of the AWG pattern.  I don't know your real requirements, so I can't advise you about how to optimize this.  It will depend on your particular problem. 


> 2) Are the complete DDS chips available that have a downloadable LUT, 
> instead of the standard sine table? 
> 
> If such chips are available, I may not have to develop a custom 
> (FPGA/CPU/DSP) solution. This question has not been answered and I have 
> found non myself sofar. 

Yeah, I've never used DDS chips, so I couldn't say.   As I've mentioned, there are many AWG products at other levels of integration, modules and boards.  eBay abounds with them. 


> > I don't know what your requirements are, but you can buy low cost AWG board level products and small box level products.
> At this time there are only general requirements (AWG, 12MHz BW, ...). 
> If the project continues, this will be detailed further. 
> 
> Do you have an example of such a board level product? If it can do what 
> will be required, it is certainly an option. 

Try punching AWG into eBay or one of the other sites. 

-- 

Rick C.

-++ Get 1,000 miles of free Supercharging
-++ Tesla referral code - https://ts.la/richard11209

On 2022-08-22 gnuarm.del...@gmail.com wrote in comp.arch.fpga:
> On Monday, August 22, 2022 at 4:24:41 AM UTC-4, Stef wrote:
>> On 2022-08-20 gnuarm.del...@gmail.com wrote in comp.arch.fpga: 
>> > On Friday, August 19, 2022 at 6:45:53 AM UTC-4, Stef wrote:
>> ...
>> >> I think it is obvious. Phase accumulator points to LUT, but LUT isn't a 
>> >> sine table but sommething else. 
>> > 
>> > Yes, it is obvious. That's why I'm asking what you are looking for from this discussion.
>> In my original post, I had 2 questions 
>> 
>> 1) Are there objections to using a prescaler and a shorter phase 
>> accumulator for generating frequencies over a wide range? 
>> 
>> This has been discussed. Conclusions is that you should keep the 
>> accumulator as long as possible for best performance. 
>
> If any of that is from my comments, I retract them.  I was thinking of a typical DDS generating a sine wave. 

Most of those comments (and of Waldek) will also apply to AWG in some
way, so no need to retract. Also the output filter argument is one
against switching sample frequency. Ofcourse I can keep the pre-scaler
option in mind, but I don't think it should be the initial approach.
Only an optimization when really necessary (speed, size, etc).


> You only need the clock rate to suit the waveform you are generating, such as Nyquist considerations.  Your memory is finite, so you have a fundamental trade off between clock rate and duration of the AWG pattern.  I don't know your real requirements, so I can't advise you about how to optimize this.  It will depend on your particular problem. 
>
>
>> 2) Are the complete DDS chips available that have a downloadable LUT, 
>> instead of the standard sine table? 
>> 
>> If such chips are available, I may not have to develop a custom 
>> (FPGA/CPU/DSP) solution. This question has not been answered and I have 
>> found non myself sofar. 
>
> Yeah, I've never used DDS chips, so I couldn't say.   As I've mentioned, there are many AWG products at other levels of integration, modules and boards.  eBay abounds with them. 
>
>
>> > I don't know what your requirements are, but you can buy low cost AWG board level products and small box level products.
>> At this time there are only general requirements (AWG, 12MHz BW, ...). 
>> If the project continues, this will be detailed further. 
>> 
>> Do you have an example of such a board level product? If it can do what 
>> will be required, it is certainly an option. 
>
> Try punching AWG into eBay or one of the other sites. 

Searching on AWG alone will find you a lot of wire. ;-)
With "arbitrary waveform generator", I get a lot of complete bench top
generators. And a number of (usually the same) cheap bare board units
like this one:
https://www.ebay.com/itm/221506533974?mkcid=16&mkevt=1&mkrid=711-127632-2357-0&ssspo=MRtVGD4USYW&sssrc=2047675&ssuid=&widget_ver=artemis&media=COPY

This one is 8-bit 256 sample 100 kSPS. Not enough on every parameter and
it seems most of these modules have similar specs.

But this is the kind of board level product you meant? I hoped for
someting that can be placed on a board. Looks like I need to implement
something myself if this project continues.


-- 
Stef

Just type 'mv * /dev/null'.