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FLASH memory programming with Altera NIOS and same question for Xilinx

Started by George January 9, 2004
I'm designing an Altera NIOS (could be Xilinx equivalent) CPU system
with external FLASH (and RAM) memory.  The Altera FPGA (probably
ACEX1K) has a JTAG port so when I get the 1st prototype I can download
a configuration using the JTAG.  But how can I program the FLASH when
it's soldered on the board?

I can't find a FLASH with a JTAG interface.  I can't preprogram the
FLASH since I don't have the code before assembly and probably want to
change it even in the field.

Any suggestions?

Thanks
George
"George" <george.martin@att.net> wrote in message
news:e9d879fa.0401090645.6a5aa1ff@posting.google.com...
> I'm designing an Altera NIOS (could be Xilinx equivalent) CPU system > with external FLASH (and RAM) memory. The Altera FPGA (probably > ACEX1K) has a JTAG port so when I get the 1st prototype I can download > a configuration using the JTAG. But how can I program the FLASH when > it's soldered on the board? > > I can't find a FLASH with a JTAG interface. I can't preprogram the > FLASH since I don't have the code before assembly and probably want to > change it even in the field. > > Any suggestions? > > Thanks > George
What about using the jtag to configure the fpga (including the NIOS and a small boot program in "rom"), and then use the NIOS to download a program via a serial cable, ethernet, or other interface and burn the flash with that?
George,

David's description is correct for Xilinx/MicroBlaze as well.  I can 
tell you first hand because I've done what you've described.

You can use the MDM (debug module) for JTAG and take the boot program 
out of the picture, or use XMDSTUB (what David describes as a small boot 
program) in Block RAM to connect via either JTAG or serial.  XMD is a 
.tcl environment so you can easily use the EDK provided flash.tcl (or 
modify it if you need to use a different part or bus width) in order to 
read in your files and transfer them over to the Flash part.  You could 
also avoid the debugger (XMD) altogether and write your own small 
program to live in Block RAM and move data to Flash that way (perhaps 
via a serial cable or ethernet).

I'd be willing to wager that Nios has very similar capabilities and 
methods, but for obvious reasons I have only used the MicroBlaze 
solution for this.

Best of luck.

Ryan Laity
Xilinx Applications

David Brown wrote:
> "George" <george.martin@att.net> wrote in message > news:e9d879fa.0401090645.6a5aa1ff@posting.google.com... > >>I'm designing an Altera NIOS (could be Xilinx equivalent) CPU system >>with external FLASH (and RAM) memory. The Altera FPGA (probably >>ACEX1K) has a JTAG port so when I get the 1st prototype I can download >>a configuration using the JTAG. But how can I program the FLASH when >>it's soldered on the board? >> >>I can't find a FLASH with a JTAG interface. I can't preprogram the >>FLASH since I don't have the code before assembly and probably want to >>change it even in the field. >> >>Any suggestions? >> >>Thanks >>George > > > What about using the jtag to configure the fpga (including the NIOS and a > small boot program in "rom"), and then use the NIOS to download a program > via a serial cable, ethernet, or other interface and burn the flash with > that? > > >
"David Brown" <david@no.westcontrol.spam.com> wrote in message news:<btnb6m$63k$1@news.netpower.no>...
> "George" <george.martin@att.net> wrote in message > news:e9d879fa.0401090645.6a5aa1ff@posting.google.com... > > I'm designing an Altera NIOS (could be Xilinx equivalent) CPU system > > with external FLASH (and RAM) memory. The Altera FPGA (probably > > ACEX1K) has a JTAG port so when I get the 1st prototype I can download > > a configuration using the JTAG. But how can I program the FLASH when > > it's soldered on the board? > > > > I can't find a FLASH with a JTAG interface. I can't preprogram the > > FLASH since I don't have the code before assembly and probably want to > > change it even in the field. > > > > Any suggestions? > > > > Thanks > > George > > What about using the jtag to configure the fpga (including the NIOS and a > small boot program in "rom"), and then use the NIOS to download a program > via a serial cable, ethernet, or other interface and burn the flash with > that?
I think you mean "rom" is housed in the fpga. Perhaps a small boot program would fit into the the FPGA rom space. But I'm afraid a full fpga would not have enough space. I'll look into that and post a follow up message here. Any ohter suggestions.
george.martin@att.net (George) wrote in message news:<e9d879fa.0401090645.6a5aa1ff@posting.google.com>...
>But how can I program the FLASH when it's soldered on the board? > > I can't find a FLASH with a JTAG interface. I can't preprogram the > FLASH since I don't have the code before assembly and probably want to > change it even in the field.
If all the flash pins are attached to the Altera, you can use the JTAG boundary scan capabilities of the Altera to program the flash. Google "jtag flash program" came up with many vendors of tools and software that does this. Alan Nishioka alann@accom.com
george.martin@att.net (George) writes:

> I think you mean "rom" is housed in the fpga. Perhaps a small boot > program would fit into the the FPGA rom space. But I'm afraid a full > fpga would not have enough space. I'll look into that and post a > follow up message here. Any ohter suggestions.
Altera has a boot monitor program called GERMS. You can upload a FPGA configuration with GERMS in on-board ROM. You can then use nios-run to upload and run code NIOS code, which again could read data from some other interface and upload the FPGA configuration to the FLASH (as others have suggested). If you plan on a production run (and test) I would suggest looking into programming the FLASH using the JTAG port of the FPGA. JTAG Technologies (and others) have software for this: (http://www.jtag.com/index.php?lg=en&p=3210) Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing on usenet and in e-mail?