Dear all, I am new to both FPGA and CPU design. I am supposed to implement a CPU on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be exactly the same. Currently I am working on translating the microcodes into verilog. It just seems too complex currently and I do not know where I can seek for more information on how to do this. Any advice or guidance will be much appreciated. Thanks! CHeers, Jalen
microcode in verilog?
Started by ●January 16, 2007
Reply by ●January 16, 20072007-01-16
Jalen.Ong@gmail.com wrote:> I am new to both FPGA and CPU design. I am supposed to implement a CPU > on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be > exactly the same.That strikes me as a very unimaginative assignment. I would drop the class and find something more creative and interesting. -- Mike Treseler
Reply by ●January 17, 20072007-01-17
>From my experience in college project related courses the instructorwould encourage the students to come up with their own ideas but if they don't come up with acceptable proposals for projects they have a list for alternative projects. I found the type of projects on the alternative list usually were of the type that would encourage me find my own. Another possibility is it is early in the semester or quarter and this could be example of an introductory project and the instructor found something about it that he can use as a vehicle for later work. And instructors are required to teach using a specific type of project and they have to change the specifics so that students don't re-use prior work or projects found on the web. Besides how many examples do we really need of PDP-8, PDP-11, DLX and MIPS processors? Mike Treseler wrote:> Jalen.Ong@gmail.com wrote: > > > I am new to both FPGA and CPU design. I am supposed to implement a CPU > > on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be > > exactly the same. > > That strikes me as a very unimaginative assignment. > I would drop the class and find something > more creative and interesting. > > -- Mike Treseler
Reply by ●January 17, 20072007-01-17
Mike Treseler wrote:> Jalen.Ong@gmail.com wrote: > > > I am new to both FPGA and CPU design. I am supposed to implement a CPU > > on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be > > exactly the same. > > That strikes me as a very unimaginative assignment. > I would drop the class and find something > more creative and interesting. > > -- Mike TreselerI wouldn't call it very unimaginative, but I can see that it would severely test the average noob undergrad, with their narrow experience. I had a quick look at the design, and it uses a very TTL centric approach, even to deploying FIVE x 8 bit PROMs to do both Opcode and Strobe work. Nifty in TTL days, but I fear too much for a HDL coder to grasp. I could not see a clean opcode listing, but a better assignment might be to take the Lattice open source Mico8, and port it to cover the CPU above. -jg
Reply by ●January 17, 20072007-01-17
<Jalen.Ong@gmail.com> wrote in message news:1168972993.972454.301270@v45g2000cwv.googlegroups.com...> Dear all, > > I am new to both FPGA and CPU design. I am supposed to implement a CPU > on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be > exactly the same. Currently I am working on translating the microcodes > into verilog. It just seems too complex currently and I do not know > where I can seek for more information on how to do this. Any advice or > guidance will be much appreciated. Thanks! > > CHeers, > Jalen >Jalen, There is more than one way to implement Magic-1 in an FPGA. Xilinx FPGAs have internal memories called BRAM which can be pre-loaded when the FPGA is configured. You could simply load these with the same binary data as Bill Buzbee programmed into his microcode PROMs. Your CPU logic could then be functionally identical to Bill's, down to gate and flip-flop level; however, there might be an easier way to do it: do you need to use microcode? Why not just write verilog to implement the same instruction set and be compatible at opcode level? Rgds Andrew.
Reply by ●January 17, 20072007-01-17
Jalen.Ong@gmail.com wrote:> Dear all, > > I am new to both FPGA and CPU design. I am supposed to implement a CPU > on FPGA. The CPU is described in www.homebrewcpu.com. It needs to be > exactly the same. Currently I am working on translating the microcodes > into verilog. It just seems too complex currently and I do not know > where I can seek for more information on how to do this. Any advice or > guidance will be much appreciated. Thanks! > > CHeers, > Jalen >Is the result supposed to be identical *in function* or specifically identical? If identical in function (quite possible) then simply code up the instruction set in HDL (whichever your prof. has specified, I suppose) so it matches what the microcode did. Cheers PeteS
