Regarding connecting two Ethernet Mac Phy

Hi everyone, I have an FPGA board with two ethernet MAC interfaces. I
want to connect both interfaces in a way that transmitter of one EMAC
IF is connected with reciever of other and vice versa. I have to have
seemless connection. Please let me know whether I would be able to
achieve it without putting EMAC core in FPGA. Is there any issues of
MII that I am supposed to deal with except clock synchronization that
can be dealt by using Block ram or some other buffering thing.
Looking for some timely reply

MADNAN

On Mar 29, 8:10 am, "Adnan" <madnan.ras...@gmail.com> wrote:
> Hi everyone, I have an FPGA board with two ethernet MAC interfaces. I
> want to connect both interfaces in a way that transmitter of one EMAC
> IF is connected with reciever of other and vice versa. I have to have
> seemless connection. Please let me know whether I would be able to
> achieve it without putting EMAC core in FPGA. Is there any issues of
> MII that I am supposed to deal with except clock synchronization that
> can be dealt by using Block ram or some other buffering thing.
> Looking for some timely reply
>
> MADNAN

1. If you have a MAC/PHY  integrated chip, then just connect the 2 PHY
outputs together with or without transformer

2. If your MAC has RMII output, just wire the RMIIs together on the 2
MACs

3. If you have only MII, inside the FPGA you have to do the MII
buffering, to interface the 2 MACs together.
Here is one reference design:
http://www.intel.com/design/network/products/lan/applnots/vhdl-code.htm
http://www.intel.com/design/network/products/lan/docs/LXT973_docs.htm

Zoltan