My Dear Spartan-3A, Please Please WAKE UP!

After giving up the search for Xilinx supplied MicroBlaze reference
designs for Xilinx Spartan-3A kit, I made the reference design using
BSB in EDK 9.1SP1.

No problem encountered until the attempt to load the bitstream into
Spartan-3A

Bitstream download succeeded, Done also OK.
Reading back JTAG Status from impact tells me EVERYTHING is OK!

But... init LED is half-way dimmed and "AWAKE" LED is off, this
behavior is the same no matter the "SUSPEND" input switch position. I
have not enabled suspend in the design, so to my understanding the
bitstream should come up alive?

But it doesnt. Is Spartan-3A in some undocumented deep sleep mode?

I was really hoping to see "Hello Spartan-3A" on the terminal, or at
least the LEDs blinking.
But all that happens is DONE=ON, AWAKE=OFF, INIT=30% dimmed.

I will fight again tomorrow, maybe I get some bright how to wake up
Spartan-3A when I sleep.

Antti

Antti schrieb:
> After giving up the search for Xilinx supplied MicroBlaze reference
> designs for Xilinx Spartan-3A kit, I made the reference design using
> BSB in EDK 9.1SP1.
>
> No problem encountered until the attempt to load the bitstream into
> Spartan-3A
>
> Bitstream download succeeded, Done also OK.
> Reading back JTAG Status from impact tells me EVERYTHING is OK!
>
> But... init LED is half-way dimmed and "AWAKE" LED is off, this

another PC, ISE 9.1 (no service pack)

Spartan-3A is working, INIT is not dimmed (OFF)

it is possible that with 9.1SP3 the FPGA also was actually configured
ok
(just the microblaze system das 100% dead), - I was irritated by the
half-way
lit INIT LED so I assumed FPGA is either misconfured or in some sleep
state.

sorry for the confusion.

Antti

On 2 Mai, 19:16, Antti <Antti.Luk...@xilant.com> wrote:
> Antti schrieb:
>
> > After giving up the search for Xilinx supplied MicroBlaze reference
> > designs for Xilinx Spartan-3A kit, I made the reference design using
> > BSB in EDK 9.1SP1.
>
> > No problem encountered until the attempt to load the bitstream into
> > Spartan-3A
>
> > Bitstream download succeeded, Done also OK.
> > Reading back JTAG Status from impact tells me EVERYTHING is OK!
>
> > But... init LED is half-way dimmed and "AWAKE" LED is off, this
>
> another PC, ISE 9.1 (no service pack)
>
> Spartan-3A is working, INIT is not dimmed (OFF)
>
> it is possible that with 9.1SP3 the FPGA also was actually configured
> ok
> (just the microblaze system das 100% dead), - I was irritated by the
> half-way
> lit INIT LED so I assumed FPGA is either misconfured or in some sleep
> state.
>
> sorry for the confusion.
>
> Antti

It useally helps to sleep over a problem - the LED behaviour on Xilinx
Spartan-3A
is all explained:

with default bitgen options (unused IOB pulldown)
* INIT LED "half-on"
* AWAKE LED OFF

bitgen unused IOB pullup
* INIT LED OFF
* AWAKE LED "half-on"

bitgen unused IOB float
* INIT LED OFF
* AWAKE LED OFF

everything as it should be. I was just confused with the INIT LED
yesterday, thats all.
There was actual issue whatsoever, just my over-reacting because other
issues.

Antti

On 2 May 2007 06:21:32 -0700, Antti <Antti.Lukats@xilant.com> wrote:

>After giving up the search for Xilinx supplied MicroBlaze reference
>designs for Xilinx Spartan-3A kit, I made the reference design using
>BSB in EDK 9.1SP1.
>
>No problem encountered until the attempt to load the bitstream into
>Spartan-3A
>
>Bitstream download succeeded, Done also OK.
>Reading back JTAG Status from impact tells me EVERYTHING is OK!
>
>But... init LED is half-way dimmed and "AWAKE" LED is off, this
>behavior is the same no matter the "SUSPEND" input switch position. I
>have not enabled suspend in the design, so to my understanding the
>bitstream should come up alive?
>
>But it doesnt. Is Spartan-3A in some undocumented deep sleep mode?
>
>I was really hoping to see "Hello Spartan-3A" on the terminal, or at
>least the LEDs blinking.
>But all that happens is DONE=ON, AWAKE=OFF, INIT=30% dimmed.
>
>I will fight again tomorrow, maybe I get some bright how to wake up
>Spartan-3A when I sleep.
>
>Antti

I am working with S3ASK, with microblaze and have no problema at all.
Maybe you forgot to set the configuration switches to JTAG? I had that
problem too!

Best regards

zara

On 7 Mai, 09:41, Zara <me_z...@dea.spamcon.org> wrote:
> On 2 May 2007 06:21:32 -0700, Antti <Antti.Luk...@xilant.com> wrote:
>
> >After giving up the search for Xilinx supplied MicroBlaze reference
> >designs for Xilinx Spartan-3A kit, I made the reference design using
> >BSB in EDK 9.1SP1.
>
> >No problem encountered until the attempt to load the bitstream into
> >Spartan-3A
>
> >Bitstream download succeeded, Done also OK.
> >Reading back JTAG Status from impact tells me EVERYTHING is OK!
>
> >But... init LED is half-way dimmed and "AWAKE" LED is off, this
> >behavior is the same no matter the "SUSPEND" input switch position. I
> >have not enabled suspend in the design, so to my understanding the
> >bitstream should come up alive?
>
> >But it doesnt. Is Spartan-3A in some undocumented deep sleep mode?
>
> >I was really hoping to see "Hello Spartan-3A" on the terminal, or at
> >least the LEDs blinking.
> >But all that happens is DONE=ON, AWAKE=OFF, INIT=30% dimmed.
>
> >I will fight again tomorrow, maybe I get some bright how to wake up
> >Spartan-3A when I sleep.
>
> >Antti
>
> I am working with S3ASK, with microblaze and have no problema at all.
> Maybe you forgot to set the configuration switches to JTAG? I had that
> problem too!
>
> Best regards
>
> zara- Zitierten Text ausblenden -
>
> - Zitierten Text anzeigen -

nono - there was NO PROBLEM..:)
I was just confused that with default setting the INIT LED is 50% on
state..
this is however NORMAL behaviour, I did not recognize that, and
assumed something was wrong.

all things work ok on s3astarter, including MicroBlaze - well without
DDR2 support :(

Antti

On 7 May 2007 01:10:36 -0700, Antti <Antti.Lukats@xilant.com> wrote:

<..>

>
>nono - there was NO PROBLEM..:)
>I was just confused that with default setting the INIT LED is 50% on
>state..
>this is however NORMAL behaviour, I did not recognize that, and
>assumed something was wrong.
>
>all things work ok on s3astarter, including MicroBlaze - well without
>DDR2 support :(
>

I have not tried yet the DDR2. What is the problem with mch_opb_ddr2
controller? It is a PREFERRED IP type, I thought it should work.

I will try to take a look at it, anyway..

Best regards,

Zara

On 7 Mai, 11:35, Zara <me_z...@dea.spamcon.org> wrote:
> On 7 May 2007 01:10:36 -0700, Antti <Antti.Luk...@xilant.com> wrote:
>
> <..>
>
>
>
> >nono - there was NO PROBLEM..:)
> >I was just confused that with default setting the INIT LED is 50% on
> >state..
> >this is however NORMAL behaviour, I did not recognize that, and
> >assumed something was wrong.
>
> >all things work ok on s3astarter, including MicroBlaze - well without
> >DDR2 support :(
>
> I have not tried yet the DDR2. What is the problem with mch_opb_ddr2
> controller? It is a PREFERRED IP type, I thought it should work.
>
> I will try to take a look at it, anyway..
>
> Best regards,
>
> Zara

Hi Zara,

I hope mch_opb_ddr2 will work, but I have been wondering
why such demo design is not available - this could be an
indication that the "out of the box" DDR2 IP core will not
work on Spartan-3A, so I am in a waiting mode, hoping
for someone to confirm the useability of EDK DDR2
ipcore on Xilinx Spartan-3A starterkit board.

Antti

On May 7, 4:41 am, Antti <Antti.Luk...@xilant.com> wrote:

[snip]

> I hope mch_opb_ddr2 will work, but I have been wondering
> why such demo design is not available - this could be an
> indication that the "out of the box" DDR2 IP core will not
> work onSpartan-3A, so I am in a waiting mode, hoping
> for someone to confirm the useability ofEDKDDR2
> ipcore on XilinxSpartan-3Astarterkit board.

Antti, I'm in the exact same spot as you are, I just got a Spartan-3A
starter kit to test DDR2 in preparation for a custom board design.

Can you share your EDK design with the group? Please also post updates
if you manage to get DDR2 to work.

I did a very quick test yesterday, and the place and route step
complained that it couldn't meet the timing. When creating the design
with BSB it stated that you have to run at 100MHz for the DDR2
controller to work. I haven't gotten further than that, I hope I
missed something basic.

                         / Chris

On 7 May 2007 13:55:54 -0700, lagerstrom@gmail.com wrote:

>On May 7, 4:41 am, Antti <Antti.Luk...@xilant.com> wrote:
>
>[snip]
>
>> I hope mch_opb_ddr2 will work, but I have been wondering
>> why such demo design is not available - this could be an
>> indication that the "out of the box" DDR2 IP core will not
>> work onSpartan-3A, so I am in a waiting mode, hoping
>> for someone to confirm the useability ofEDKDDR2
>> ipcore on XilinxSpartan-3Astarterkit board.
>
>Antti, I'm in the exact same spot as you are, I just got a Spartan-3A
>starter kit to test DDR2 in preparation for a custom board design.
>
>Can you share your EDK design with the group? Please also post updates
>if you manage to get DDR2 to work.
>
>I did a very quick test yesterday, and the place and route step
>complained that it couldn't meet the timing. When creating the design
>with BSB it stated that you have to run at 100MHz for the DDR2
>controller to work. I haven't gotten further than that, I hope I
>missed something basic.


I am now tryiong to start the DDR2 with Microblaze. It will not
achieve timnog constarints with 100MHz system clock, but it will
achieve them with 66.666MHz system clock! More to come...

Zara

On 8 Mai, 09:56, Zara <me_z...@dea.spamcon.org> wrote:
> On 7 May 2007 13:55:54 -0700, lagerst...@gmail.com wrote:
>
[..]
> I am now tryiong to start the DDR2 with Microblaze. It will not
> achieve timnog constarints with 100MHz system clock, but it will
> achieve them with 66.666MHz system clock! More to come...
>
> Zara- Zitierten Text ausblenden -
>
> - Zitierten Text anzeigen -

its VERY hard to meat 100MHz timings even in V4 or V5
so I no wonder the EDK-DDR2 design in Spartan-3A
doesnt want to meat 100MHz timings.

also check the Spartan3A "product notification" and your PCB rev.
if you have REV C you need to solder bridge 2 ferrites to get the DDR2
to work at higher clock rates.

Antti