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RS-232 Bus controller design in VHDL

Started by ikki November 4, 2008
Hi there everyone, I hope I could find my answer here.

I am looking for RS-232 bus controller design in VHDL. To be precise, I
need the Receiver and Transmitter coding in VHDL. 

I will only be using 3 pins out of 9 pins of the DB9. There are RXD , TXD
and ground signals. 

My DTE is PC while my DCE is Xilinx Spartan 3. Im planning to send data
using hyperterminal from PC to RS-232 receiver and this receiver will
display the date at a 7-segment display. On the other hand, There will be a
8 bits switch to send data back to PC to be displayed at the hyper
terminal.

help is appreciated ... thanks



In comp.arch.fpga,
ikki <jasperng10@gmail.com> wrote:
> Hi there everyone, I hope I could find my answer here. > > I am looking for RS-232 bus controller design in VHDL. To be precise, I > need the Receiver and Transmitter coding in VHDL.
These controllers are commonly known as UART. Google the words UART and VHDL and you will find a lot of examples. Add the word Treseler to the search if you want to find an example by someone who reads this group frequently. A UART is not very hard to code and often used as an example. If you know how a UART works (get a datasheet of one), it is not that hard to write your own. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) No man would listen to you talk if he didn't know it was his turn next. -- E.W. Howe
>In comp.arch.fpga, >ikki <jasperng10@gmail.com> wrote: >> Hi there everyone, I hope I could find my answer here. >> >> I am looking for RS-232 bus controller design in VHDL. To be precise,
I
>> need the Receiver and Transmitter coding in VHDL. > >These controllers are commonly known as UART. Google the words UART and >VHDL and you will find a lot of examples. Add the word Treseler to the >search if you want to find an example by someone who reads this group >frequently. > >A UART is not very hard to code and often used as an example. If you >know how a UART works (get a datasheet of one), it is not that hard >to write your own. > > >-- >Stef (remove caps, dashes and .invalid from e-mail address to reply by
mail)
> >No man would listen to you talk if he didn't know it was his turn next. > -- E.W. Howe >
Thanks for you reply, I know there are plenty of UART. However most of them incorporate handshaking signals which i do not need it for my design. THus, Im just looking for a simple rs232 UART design. Also, Im also wondering anyone has the block diagram (architecture) of the RS232 UART ? ...
In comp.arch.fpga,
ikki <jasperng10@gmail.com> wrote:
>>In comp.arch.fpga, >>ikki <jasperng10@gmail.com> wrote: >>> Hi there everyone, I hope I could find my answer here. >>> >>> I am looking for RS-232 bus controller design in VHDL. To be precise, > I >>> need the Receiver and Transmitter coding in VHDL. >> >>These controllers are commonly known as UART. Google the words UART and >>VHDL and you will find a lot of examples. Add the word Treseler to the >>search if you want to find an example by someone who reads this group >>frequently. >> >>A UART is not very hard to code and often used as an example. If you >>know how a UART works (get a datasheet of one), it is not that hard >>to write your own. >> >> >>-- >>Stef (remove caps, dashes and .invalid from e-mail address to reply by > mail) >> >>No man would listen to you talk if he didn't know it was his turn next. >> -- E.W. Howe >> > > Thanks for you reply, > > I know there are plenty of UART. However most of them incorporate > handshaking signals which i do not need it for my design. THus, Im just > looking for a simple rs232 UART design. > > Also, Im also wondering anyone has the block diagram (architecture) of the > RS232 UART ? ... >
Have you actually entered "UART VHDL" (without the quotes) in the google search field and followed any of the result links? Doesn't sound like it, if I do that there are at least 4 simplified uarts (tx/rx only) on the first result page. There's even a code downloadable example in those first results. And what if you only found more complicated examples? Cutting them down to what you need shouldn't be that hard. And try following a few links on that search page, you might even find block diagrams and stuff. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) I'm using my X-RAY VISION to obtain a rare glimpse of the INNER WORKINGS of this POTATO!!
In comp.arch.fpga,
ikki <jasperng10@gmail.com> wrote:
> > I know there are plenty of UART. However most of them incorporate > handshaking signals which i do not need it for my design. THus, Im just > looking for a simple rs232 UART design.
Furthermore... You say 'most' of them include handshaking. This implies that you also found at least one which didn't, or else you would have written 'all'. What was wrong with the one(s) without handshake? -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) Never make anything simple and efficient when a way can be found to make it complex and wonderful.
ikki wrote:

> I know there are plenty of UART. However most of them incorporate > handshaking signals which i do not need it for my design. THus, Im just > looking for a simple rs232 UART design.
Like this? port ( clock : in std_ulogic; reset : in std_ulogic; address : in std_ulogic; writeData : in std_logic_vector(char_len_g-1 downto 0); write_stb : in std_ulogic; readData : out std_logic_vector(char_len_g-1 downto 0); read_stb : in std_ulogic; serialIn : in std_ulogic; serialOut : out std_ulogic ); http://mysite.verizon.net/miketreseler/uart.vhd
> Also, Im also wondering anyone has the block diagram (architecture) of the > RS232 UART ? ...
http://mysite.verizon.net/miketreseler/uart.pdf
On Nov 4, 4:48=A0am, "ikki" <jaspern...@gmail.com> wrote:
> Hi there everyone, I hope I could find my answer here. > > I am looking for RS-232 bus controller design in VHDL. To be precise, I > need the Receiver and Transmitter coding in VHDL. > > I will only be using 3 pins out of 9 pins of the DB9. There are RXD , TXD > and ground signals. > > My DTE is PC while my DCE is Xilinx Spartan 3. Im planning to send data > using hyperterminal from PC to RS-232 receiver and this receiver will > display the date at a 7-segment display. On the other hand, There will be=
a
> 8 bits switch to send data back to PC to be displayed at the hyper > terminal. > > help is appreciated ... thanks
Picoblaze comes with serial comms stuff. At least, I think that's what I used some time ago.
On Nov 4, 4:24=A0pm, mng <michael.jh...@gmail.com> wrote:
> On Nov 4, 4:48=A0am, "ikki" <jaspern...@gmail.com> wrote: > > > Hi there everyone, I hope I could find my answer here. > > > I am looking for RS-232 bus controller design in VHDL. To be precise, I > > need the Receiver and Transmitter coding in VHDL. > > > I will only be using 3 pins out of 9 pins of the DB9. There are RXD , T=
XD
> > and ground signals. > > > My DTE is PC while my DCE is Xilinx Spartan 3. Im planning to send data > > using hyperterminal from PC to RS-232 receiver and this receiver will > > display the date at a 7-segment display. On the other hand, There will =
be a
> > 8 bits switch to send data back to PC to be displayed at the hyper > > terminal. > > > help is appreciated ... thanks > > Picoblaze comes with serial comms stuff. At least, I think that's what > I used some time ago.
On that note, UartLite core is a simple UART controller. I used it with Microblaze without the flow control. However, it looks as you want to avoid EDK altogether.
On Nov 4, 9:20=A0am, "ikki" <jaspern...@gmail.com> wrote:
> >In comp.arch.fpga, > >ikki <jaspern...@gmail.com> wrote: > >> Hi there everyone, I hope I could find my answer here. > > >> I am looking for RS-232 bus controller design in VHDL. To be precise, > I > >> need the Receiver and Transmitter coding in VHDL. > > >These controllers are commonly known as UART. Google the words UART and > >VHDL and you will find a lot of examples. Add the word Treseler to the > >search if you want to find an example by someone who reads this group > >frequently. > > >A UART is not very hard to code and often used as an example. If you > >know how a UART works (get a datasheet of one), it is not that hard > >to write your own. > > >-- > >Stef =A0 =A0(remove caps, dashes and .invalid from e-mail address to rep=
ly by
> mail) > > >No man would listen to you talk if he didn't know it was his turn next. > > =A0 =A0 =A0 =A0 =A0 =A0-- E.W. Howe > > Thanks for you reply, > > I know there are plenty of UART. However most of them incorporate > handshaking signals which i do not need it for my design. THus, Im just > looking for a simple rs232 UART design. > > Also, Im also wondering anyone has the block diagram (architecture) of th=
e
> RS232 UART ? ...
It is a common misconception that RS232 is a communication protocol specification. In fact it only specifies the voltages used over the cables. RS232 signalling runs nominally at +/- 10 volts. However there are some implementations that use a positive threshold on the receiver and then drive only 0 to 5 volts on the interface. An example would be old Apple computers. No FPGA actually drives or receives RS232 signals directly. You need at a minimum an RS232 to logic-level transceiver.
On Nov 5, 6:24 am, Gabor <ga...@alacron.com> wrote:
> On Nov 4, 9:20 am, "ikki" <jaspern...@gmail.com> wrote: > > > > > >In comp.arch.fpga, > > >ikki <jaspern...@gmail.com> wrote: > > >> Hi there everyone, I hope I could find my answer here. > > > >> I am looking for RS-232 bus controller design in VHDL. To be precise, > > I > > >> need the Receiver and Transmitter coding in VHDL. > > > >These controllers are commonly known as UART. Google the words UART and > > >VHDL and you will find a lot of examples. Add the word Treseler to the > > >search if you want to find an example by someone who reads this group > > >frequently. > > > >A UART is not very hard to code and often used as an example. If you > > >know how a UART works (get a datasheet of one), it is not that hard > > >to write your own. > > > >-- > > >Stef (remove caps, dashes and .invalid from e-mail address to reply by > > mail) > > > >No man would listen to you talk if he didn't know it was his turn next. > > > -- E.W. Howe > > > Thanks for you reply, > > > I know there are plenty of UART. However most of them incorporate > > handshaking signals which i do not need it for my design. THus, Im just > > looking for a simple rs232 UART design. > > > Also, Im also wondering anyone has the block diagram (architecture) of the > > RS232 UART ? ... > > It is a common misconception that RS232 is a communication protocol > specification. In fact it only specifies the voltages used over the > cables. > > RS232 signalling runs nominally at +/- 10 volts. However there are > some > implementations that use a positive threshold on the receiver and then > drive only 0 to 5 volts on the interface. An example would be old > Apple > computers. > > No FPGA actually drives or receives RS232 signals directly. You need > at > a minimum an RS232 to logic-level transceiver.
Just to pick a nit.... RS-232 does have a protocol. RTS-CTS, DSR-DTR, etc. V.24 describes the signal levels without mentioning the signal assertion/response. So the OP is really saying "I want RS-232 protocol WITHOUT the protocol". Still a miss-formed question. Cheers.