Hello all, I've had an enquiry in about a project that is mostly simple enough, I'll be using an FPGA for what's required, the fly in the ointment is the client wants the thing unit via TCP/IP. All the ethernet interface is going to be used for is driving and reading internal registers, it could very easily be done via RS-422 (which is an option) but it looks like they definitely want TCP/IP. One approach would be to implement a NIOS core with OS and network stacks, I'd have to outsource setting this all up. This really does seem to be a lot of added complexity required both in FPGA resource and external components required to support the NIOS. It would also require licensing the NIOS IPS-Embedded suite and an OS (or does it?) which isn't cheap. Another approach would be to use a microcontroler with embedded TCP/IP stack and MAC and use this to drive the FPGA via an external bus, although I think an SPI bus might be sufficient. I have designed a couple of boards with an ethernet interface but this was to an ARM device where a SW engineer had the responsibility of getting it all set up and working. Can anyone comment on the difficulty of implementing an ethernet interface with a NIOS core, or advise on a small simple microcontroller that would make this all much simpler. Thanks in advance, Nial.
Driving a design via TCP/IP
Started by ●October 6, 2010
Reply by ●October 6, 20102010-10-06
On Wed, 6 Oct 2010 16:32:26 +0100, "Nial Stewart" <nial*REMOVE_THIS*@nialstewartdevelopments.co.uk> wrote:>Hello all, > >I've had an enquiry in about a project that is mostly simple enough, >I'll be using an FPGA for what's required, the fly in the ointment is >the client wants the thing unit via TCP/IP. > >All the ethernet interface is going to be used for is driving and reading >internal registers, it could very easily be done via RS-422 (which is an >option) but it looks like they definitely want TCP/IP. > >One approach would be to implement a NIOS core with OS and network stacks, >I'd have to outsource setting this all up. This really does seem to be >a lot of added complexity required both in FPGA resource and external >components required to support the NIOS. > >It would also require licensing the NIOS IPS-Embedded suite and an >OS (or does it?) which isn't cheap. > >Another approach would be to use a microcontroler with embedded TCP/IP >stack and MAC and use this to drive the FPGA via an external bus, >although I think an SPI bus might be sufficient. > >I have designed a couple of boards with an ethernet interface but this >was to an ARM device where a SW engineer had the responsibility of getting >it all set up and working. > >Can anyone comment on the difficulty of implementing an ethernet interface >with a NIOS core, or advise on a small simple microcontroller that would >make this all much simpler.Depending on where you are on the build/buy curve, the little XPort gizmos are often an easy answer. From the inside of the box, looking out, it appears as a serial port. From the outside it handles UDP/IP or TCP/IP (configurable). Could be a good fit for configuration & status. <http://www.lantronix.com/device-networking/embedded-device-servers/xport.html> -- Rich Webb Norfolk, VA
Reply by ●October 6, 20102010-10-06
On 10/6/2010 4:32 PM, Nial Stewart wrote:> > Can anyone comment on the difficulty of implementing an ethernet interface > with a NIOS core, or advise on a small simple microcontroller that would > make this all much simpler. > > Thanks in advance, > > Nial. > >http://www.fpga4fun.com/10BASE-T.html Any help? Syms.
Reply by ●October 6, 20102010-10-06
> Depending on where you are on the build/buy curve, the little XPort > gizmos are often an easy answer. From the inside of the box, looking > out, it appears as a serial port. From the outside it handles UDP/IP or > TCP/IP (configurable). Could be a good fit for configuration & status. > > <http://www.lantronix.com/device-networking/embedded-device-servers/xport.html>Thanks Rich, I'm completely open to any solution which simply provides TCP/IP access to the unit. That looks like an ideal solution! Nial.
Reply by ●October 6, 20102010-10-06
> http://www.fpga4fun.com/10BASE-T.html > Any help? > Syms.Aye possibly although I'd prefer a 'canned' solution where possible. From what I've got so far the main portion of the design is a week or two's work. I don't want to have to spend another month getting the e'net connectivity working. Nial.
Reply by ●October 6, 20102010-10-06
Rich Webb wrote:> On Wed, 6 Oct 2010 16:32:26 +0100, "Nial Stewart">>Can anyone comment on the difficulty of implementing an ethernet interface >>with a NIOS core, or advise on a small simple microcontroller that would >>make this all much simpler. > > Depending on where you are on the build/buy curve, the little XPort > gizmos are often an easy answer. From the inside of the box, looking > out, it appears as a serial port. From the outside it handles UDP/IP or > TCP/IP (configurable). Could be a good fit for configuration & status. > > <http://www.lantronix.com/device-networking/embedded-device-servers/xport.html> A similar device providing the equivalent of four AF_INET sockets on a chip and speaking SPI or memory-bus connection is <http://www.wiznet.co.kr/Sub_Modules/en/product/Product_Detail.asp?cate1=5&cate2=7&cate3=26&pid=1011> or a module based on it <http://www.saelig.com/BRD/ETH027.htm> These chips/boards are the ones I used. There are probably more recent versions. Mel.
Reply by ●October 6, 20102010-10-06
On 10/6/2010 4:59 PM, Nial Stewart wrote:>> http://www.fpga4fun.com/10BASE-T.html >> Any help? >> Syms. > > > Aye possibly although I'd prefer a 'canned' solution where possible. > > From what I've got so far the main portion of the design is a week > or two's work. I don't want to have to spend another month getting the > e'net connectivity working. > > > Nial. > >Yep, the solutions from the other posts are much better. A bit like those USB thingies from FTDI. Syms.
Reply by ●October 6, 20102010-10-06
> Yep, the solutions from the other posts are much better. A bit like those USB thingies from FTDI.Aye that's what I'm looking for, I don't want to have to do anything actually difficult! :-) Nial.
Reply by ●October 6, 20102010-10-06
"Nial Stewart" <nial*REMOVE_THIS*@nialstewartdevelopments.co.uk> wrote:>Hello all, > >I've had an enquiry in about a project that is mostly simple enough, >I'll be using an FPGA for what's required, the fly in the ointment is >the client wants the thing unit via TCP/IP. > >All the ethernet interface is going to be used for is driving and reading >internal registers, it could very easily be done via RS-422 (which is an >option) but it looks like they definitely want TCP/IP. > >One approach would be to implement a NIOS core with OS and network stacks, >I'd have to outsource setting this all up. This really does seem to be >a lot of added complexity required both in FPGA resource and external >components required to support the NIOS. > >It would also require licensing the NIOS IPS-Embedded suite and an >OS (or does it?) which isn't cheap. > >Another approach would be to use a microcontroler with embedded TCP/IP >stack and MAC and use this to drive the FPGA via an external bus, >although I think an SPI bus might be sufficient. > >I have designed a couple of boards with an ethernet interface but this >was to an ARM device where a SW engineer had the responsibility of getting >it all set up and working. > >Can anyone comment on the difficulty of implementing an ethernet interface >with a NIOS core, or advise on a small simple microcontroller that would >make this all much simpler.FreeRtos (freertos.org) + NXP LPC17xx. -- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
Reply by ●October 6, 20102010-10-06
Nial Stewart wrote:> Hello all, > > I've had an enquiry in about a project that is mostly simple enough, > I'll be using an FPGA for what's required, the fly in the ointment is > the client wants the thing unit via TCP/IP. > > All the ethernet interface is going to be used for is driving and reading > internal registers, it could very easily be done via RS-422 (which is an > option) but it looks like they definitely want TCP/IP.If it is not specified how the TCP/IP is to be used, you can design a simple request-response exchange based on simple UDP packets. It is not too tedious to implement the protocol stack up to UDP even for raw silicon. The difficult beast is TCP.> Another approach would be to use a microcontroler with embedded TCP/IP > stack and MAC and use this to drive the FPGA via an external bus, > although I think an SPI bus might be sufficient.Get a controller with Ethernet and SPI, e.g. Stellaris LM3S6965. The dev board is pretty inexpensive (less than 100 USD, IIRC) and you should be able to do the required networking with it for testing. -- Tauno Voipio tauno voipio (at) iki fi
