Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
A new approach to the study of arithmetic circuits In Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, the authors take a novel approach of presenting methods and examples for the synthesis of arithmetic circuits that better reflects the needs of today's computer system designers and engineers. Unlike other publications that limit discussion to arithmetic units for general-purpose computers, this text features a practical focus on embedded systems. Following an introductory chapter, the publication is divided into two parts. The first part, Mathematical Aspects and Algorithms, includes mathematical background, number representation, addition and subtraction, multiplication, division, other arithmetic operations, and operations in finite fields. The second part, Synthesis of Arithmetic Circuits, includes hardware platforms, general principles of synthesis, adders and subtractors, multipliers, dividers, and other arithmetic primitives. In addition, the publication distinguishes itself with: A separate treatment of algorithms and circuits-a more useful presentation for both software and hardware implementations Complete executable and synthesizable VHDL models available on the book's companion Web site, allowing readers to generate synthesizable descriptions Proposed FPGA implementation examples, namely synthesizable low-level VHDL models for the Spartan II and Virtex families Two chapters dedicated to finite field operations This publication is a must-have resource for students in computer science and embedded system designers, engineers, and researchers in the field of hardware and software computer system design and development. An Instructor Support FTP site is available from the Wiley editorial department.
Why Read This Book
You will get a rigorous yet application-oriented treatment of arithmetic circuits that bridges mathematical algorithms and hardware synthesis, so you can make informed trade-offs between speed, area, and power. The book walks from number representation through adders, multipliers, dividers and finite-field arithmetic, giving you techniques directly useful when architecting arithmetic blocks for FPGA and ASIC targets.
Who Will Benefit
Intermediate-to-advanced digital designers, FPGA/ASIC architects, and DSP/cryptography engineers who need to design or optimize integer, fixed-point and finite-field arithmetic units for embedded hardware.
Level: Advanced — Prerequisites: Basic digital logic and computer arithmetic, undergraduate-level discrete math/number systems, and familiarity with hardware implementation concepts (timing, area, pipelining).
Key Takeaways
- Select and apply appropriate number representations (signed, unsigned, redundant, modular, finite-field) for target arithmetic tasks.
- Design and analyze a variety of adder architectures and optimize them for latency and area.
- Implement and architect multiplication circuits (array, Wallace, Booth, pipelined) with synthesis-aware trade-offs for FPGA/ASIC.
- Understand and implement division and reciprocal algorithms suitable for hardware realization.
- Apply finite-field (GF(2^m)) arithmetic techniques used in cryptography and error-correction hardware.
- Translate arithmetic algorithms into synthesis-friendly architectures and evaluate area/speed/power trade-offs for embedded systems.
Topics Covered
- 1. Introduction and Motivation: Arithmetic in Embedded Systems
- 2. Mathematical Background and Number Representations
- 3. Addition and Subtraction: Architectures and Analysis
- 4. Multiplication: Algorithms and Hardware Implementations
- 5. Division, Reciprocals and Digit-Recurrence Methods
- 6. Other Arithmetic Operations: Scaling, Normalization, and Conversion
- 7. Arithmetic in Finite Fields (GF(2^m)) and Polynomial Arithmetic
- 8. Algorithm-Architecture Mapping and Synthesis Techniques
- 9. Implementation Issues for FPGA and ASIC Targets
- 10. Optimization Strategies: Pipelining, Retiming and Resource Sharing
- 11. Case Studies and Design Examples for Embedded Systems
- 12. Appendices: Mathematical Proofs and Implementation Notes
Languages, Platforms & Tools
How It Compares
Covers similar ground to Behrooz Parhami's 'Computer Arithmetic' but places more emphasis on synthesis and mapping algorithms to hardware for embedded/FPGA/ASIC targets rather than exhaustive algorithmic taxonomy.
