open support question to Xilinx. should be fairly simple to answer.

Started by Antti Lukats in comp.arch.fpga13 years ago 5 replies

Hi Dear Xilinx and users of Xilinx FPGA devices, Q: is it possible to use: 1) Xilinx ISE/EDK 7.1 all latest service packs 2) Xilinx...

Hi Dear Xilinx and users of Xilinx FPGA devices, Q: is it possible to use: 1) Xilinx ISE/EDK 7.1 all latest service packs 2) Xilinx platform usb cable (pld updated by impact 7.1) 3) target device Xilinx V4 LX25 4) EDK XMD (I think I tried all variants of them!) All the above are Xilinx latest and greatest! To my understanding its not possible to get them to work, XMD fails to conne...


Xilinx online documentation issues

Started by step...@gmail.com in comp.arch.fpga8 years ago

Having been away from active FPGA development for a couple of years, I was surprised to discover the sorry state of Xilinx's...

Having been away from active FPGA development for a couple of years, I was surprised to discover the sorry state of Xilinx's documentation. Perhaps it has always been this way... Xilinx Application Notes -- I have found two application notes on the Chinese Xilinx site that do not appear on the main Xilinx web site (XAPPs 730 and 934). Has Xilinx pulled them? Webpack Supported Devices --...


OS for Xilinx tools

Started by step...@gmail.com in comp.arch.fpga8 years ago 1 reply

Xilinx users, I have seemingly contradictory desires: a 64-bit OS and the ability to run all of the Xilinx tools, including AccelDSP. The...

Xilinx users, I have seemingly contradictory desires: a 64-bit OS and the ability to run all of the Xilinx tools, including AccelDSP. The official Xilinx list of supported OSes shows only the 32-bit version of XP as supporting everything. http://www.xilinx.com/ise/ossupport/index.htm Is it possible to run the Xilinx tools under a Windows-based 64-bit OS? Would I see benefits from th...


ISE11.1 environment variables mess

Started by MM in comp.arch.fpga9 years ago

Arghhh! Is Xilinx ever going to learn to make things relative?!!! If they defined %XILINX% why do they put whole bunch of absolute paths to the...

Arghhh! Is Xilinx ever going to learn to make things relative?!!! If they defined %XILINX% why do they put whole bunch of absolute paths to the PATH? C:\Xilinx\11.1\ChipScope\bin\nt;C:\Xilinx\11.1\common\bin\nt;C:\Xilinx\11.1\common\lib\nt; Don't really expect an answer, just needed to let the steam out .... /Mikhail


xilinx software licenses and updates

Started by E.S. in comp.arch.fpga13 years ago

Hi all, a little rant, but anyway ... Anyone else on this group is annoyed with the Software Licenses Database at xilinx ? I was trying to...

Hi all, a little rant, but anyway ... Anyone else on this group is annoyed with the Software Licenses Database at xilinx ? I was trying to get an update for my EDK, and noticed it again. I'm not in the computer ;-) I receive emails all the time from xilinx, because "I'm a registered user". I have a Xilinx Site ID, Xilinx Support ID, a lot of emails with with registration and produkt ...


ESP8266 based Xilinx Virtual Cable server?

Started by Wojciech M. Zabolotny in comp.arch.fpga2 years ago 1 reply

Hi, I often need to access the debugged FPGA boards remotely. Now when Xilinx has made its Xilinx Virtual Cable specification...

Hi, I often need to access the debugged FPGA boards remotely. Now when Xilinx has made its Xilinx Virtual Cable specification available: http://www.xilinx.com/products/intellectual-property/xvc.html https://github.com/Xilinx/XilinxVirtualCable and when it is included in the newer versions of Vivado suite: http://forums.xilinx.com/t5/General-Technical-Discussion/XVC-Protocol-Support-In-Vi...


Xilinx legacy situation

Started by Tim Forcer in comp.arch.fpga14 years ago 15 replies

We have some well-established teaching laboratory kit, using Xilinx XC4013E (optionally XC4020E for project work), with download by JTAG and a...

We have some well-established teaching laboratory kit, using Xilinx XC4013E (optionally XC4020E for project work), with download by JTAG and a clone of Xilinx Parallel Cable III (DLC5). As has been discussed here before, despite some statements on Xilinx Website, the latest (full-spec) Xilinx software includes an iMPACT downloader which doesn't support Parallel Cable III. Alternatively, ...


New to Xilinx Software - help with downlaod

Started by Kranthi Q in comp.arch.fpga13 years ago 1 reply

Hi, I want to learn to use the Xilinx Software and was wondering which one to download.. What is the difference between Xilinx Student...

Hi, I want to learn to use the Xilinx Software and was wondering which one to download.. What is the difference between Xilinx Student Edition 4.2i and Xilinx webpack?? which is better to download??? and How are they and what do they offer?? I am new to this and would appreciate the help!!! Thank you. Kranthi.


does SRL exist in non-xilinx FPGAs?

Started by Anonymous in comp.arch.fpga11 years ago 1 reply

Hey, Is there any non-xilinx FPGA that has the equivalent of Xilinx Virtex SRL component as a basic component logic? If Not, why? has...

Hey, Is there any non-xilinx FPGA that has the equivalent of Xilinx Virtex SRL component as a basic component logic? If Not, why? has Xilinx patented it? Many Thanks :)


Quote from Xilinx re: XPLA3

Started by Chris Carlen in comp.arch.fpga14 years ago 3 replies

Greetings: Here's a response from a Xilinx fellow who responded to me by email regarding my recent query on the group about XPLA3 seeming to...

Greetings: Here's a response from a Xilinx fellow who responded to me by email regarding my recent query on the group about XPLA3 seeming to be de-emphasized on the Xilinx web site: --------------------------------------------------------------- Rumors of our demise are highly exaggerated! Xilinx currently has no intention of discontinuing the XPLA3 CPLD product line. This family i...


Using RiscWatch with Xilinx FPGA's for powerpc

Started by Pankaj in comp.arch.fpga12 years ago 1 reply

Using RiscWatch with Xilinx FPGA's for powerpc. I have Xilinx 7.1 package with xilinx fpga boards , as well ML310 with virtex 2p devices ,on...

Using RiscWatch with Xilinx FPGA's for powerpc. I have Xilinx 7.1 package with xilinx fpga boards , as well ML310 with virtex 2p devices ,on which powerpc and microblaze architectures are supported. I wanted to run an application on this powerpc architecutre and debug it. As i am using powerpc so i think risc watch debugger would be better. But my question is does xilinx provide support ...


Xilinx multiplier out of slices

Started by Peter Sommerfeld in comp.arch.fpga13 years ago 4 replies

Hi, I'm new to the Xilinx tools. How do I tell Xilinx ISE 7.1 to synthesise the following statement: y

Hi, I'm new to the Xilinx tools. How do I tell Xilinx ISE 7.1 to synthesise the following statement: y


Design Compiler and Xilinx-Libs - Possible ?

Started by Andreas Baenisch in comp.arch.fpga13 years ago

Hi All I found a document on the Xilinx-Website that explained how to do that (Xilinx Synopsys Interface) Unfortunatly I can't find the...

Hi All I found a document on the Xilinx-Website that explained how to do that (Xilinx Synopsys Interface) Unfortunatly I can't find the required files in my installation of the Xilinx-Webedition (synopsys/libraries/dw/src) Are those files only provided with the full ISE ? Greetings Andi


Xilinx MicroBlaze 4.00.a source codes released by Xilinx !?

Started by Antti in comp.arch.fpga11 years ago 9 replies

get from Xilinx website http://www.xilinx.com/bvdocs/appnotes/xapp730.zip unzip, then look in /pcores/microblaze_4_00_a/hdl/vhdl that...

get from Xilinx website http://www.xilinx.com/bvdocs/appnotes/xapp730.zip unzip, then look in /pcores/microblaze_4_00_a/hdl/vhdl that looks like true unscrambled RTL source of the MicroBlaze !? Or am I seeing wrong ? Antti


Xilinx upgrade

Started by Anonymous in comp.arch.fpga10 years ago 4 replies

please i=B4m very new on this, whats the difference between Xilinx ISE and Xilinx=B4s EDK, and what for is the IP ???

please i=B4m very new on this, whats the difference between Xilinx ISE and Xilinx=B4s EDK, and what for is the IP ???


Perl + Xilinx + commandline = Module::Build::Xilinx

Started by vicash in comp.arch.fpga3 years ago 4 replies

Hello I have released Module::Build::Xilinx (currently at version 0.05) to CPAN. (https://metacpan.org/pod/Module::Build::Xilinx) This is a...

Hello I have released Module::Build::Xilinx (currently at version 0.05) to CPAN. (https://metacpan.org/pod/Module::Build::Xilinx) This is a tool that you can use to create a simple makefile like Build.PL script such as done by standard perl modules. Module::Build::Xilinx subclasses Module::Build to create, build, simulate, view and program Xilinx FPGA development boards by using Perl to m...


OT: sun vs xilinx

Started by Sandro in comp.arch.fpga11 years ago

Sorry for the OT post... but the curiosity... (kill the cat...) Is Sun acquiring Xilinx ? http://www.xilinx.com/favicon.ico seems the Sun...

Sorry for the OT post... but the curiosity... (kill the cat...) Is Sun acquiring Xilinx ? http://www.xilinx.com/favicon.ico seems the Sun logo xilinx guys... please change your favicon ;-) Sandro


Xilinx: Where has all the data gone?

Started by Gabor in comp.arch.fpga12 years ago 1 reply

Browsing the Xilinx website documentation I seem to get no data sheets, user guides, or package drawings. Just: Sorry... Technical...

Browsing the Xilinx website documentation I seem to get no data sheets, user guides, or package drawings. Just: Sorry... Technical difficulties with the Xilinx.com web site have been solved. If you are continuing to have difficulty accessing Xilinx.com, you may need to exit your browser software and restart it. Please accept our apologies for any difficulties you have experienced. I tr...


Latest Xilinx Software

Started by 2cents in comp.arch.fpga7 years ago 1 reply

Did anyone see this video of 13.1? https://xilinx.webex.com/xilinx/lsr.php?AT=pb&SP=EC&rID=3372608&rKey=38aaf4d8e5851be5 Looks like a big leap...

Did anyone see this video of 13.1? https://xilinx.webex.com/xilinx/lsr.php?AT=pb&SP=EC&rID=3372608&rKey=38aaf4d8e5851be5 Looks like a big leap forward...


Xilinx System Generator crashes repeatedly

Started by Anonymous in comp.arch.fpga11 years ago 2 replies

I am sorry for posting this as I have already posted it on the comp.soft-sys.matlab. I have a MatLab 7.2/Simulink 6.4/Xilinx System Generator...

I am sorry for posting this as I have already posted it on the comp.soft-sys.matlab. I have a MatLab 7.2/Simulink 6.4/Xilinx System Generator 8.1.01 software installation. My problem is that the Xilinx Simulink blockset is entirely unstable. For example, when I try to change the properties of any Xilinx block, the Java runtime often crashes and takes MatLab with it. All other non-Xilinx bl...