Design Notation VHDL or Verilog?

any comments on either VHDL or  Verilog?

On Jan 28, 7:04=A0pm, vsh <henry.val.sc...@gmail.com> wrote:
> any comments on either VHDL or =A0Verilog?

VHDL

vsh <henry.val.scott@gmail.com> writes:

> any comments on either VHDL or  Verilog?

Yes, *both* languages have comments!

Traditionally, VHDL uses two dashes (--) to signify comments.  The
newer-fangled VHDL-2008 syntax also allows the use of C-style multi-line
comments enclosed in /* */ pairs.

As in so many other ways, Verilog uses c style syntax - both /* */ and
// are valid.

Does that help?

Cheers,
Martin


-- 
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.co.uk/capabilities/39-electronic-hardware

On Jan 29, 12:04=A0am, vsh <henry.val.sc...@gmail.com> wrote:
> any comments on either VHDL or =A0Verilog?

Can't comment on VHDL other than to say it always strikes me as
difficult to decipher and untidy looking.  I'd be interested to know
if there's anything useful that you can do in VHDL that you can't in
Verilog.

I'm a Verilog user and like the straight-forward syntax.  Like
anything you can make a mess if you don't try hard enough not to.

>any comments on either VHDL or  Verilog?
>

A competent designer could use either to implement a digital logic system.
	   
					
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On Jan 30, 5:32=A0am, davew <david.wo...@gmail.com> wrote:
> On Jan 29, 12:04=A0am, vsh <henry.val.sc...@gmail.com> wrote:
>
> > any comments on either VHDL or =A0Verilog?
>
> Can't comment on VHDL other than to say it always strikes me as
> difficult to decipher and untidy looking. =A0I'd be interested to know
> if there's anything useful that you can do in VHDL that you can't in
> Verilog.
>
> I'm a Verilog user and like the straight-forward syntax. =A0Like
> anything you can make a mess if you don't try hard enough not to.

With the 2008 fixed point package, VHDL allows synthesizable fixed
point arithmetic of arbitrary precision and binary point location. The
arithmetic operators and types are defined to automatically handle
mixed precision/point arithmetic for you. To the best of my knowledge,
the Verilog language in its current form cannot support this
capability at all.

Similarly, VHDL also has a floating point package that handles
arbitrary sizes of data and exponent.

The fixed and floating point packages were demonstrated prior to 2008
with no changes to the language required (that's the power of VHDL
types and overloading), and the only 2008 features that the current
packages use are package generics, to allow user specification of
operator behaviors for rounding, saturation, guard bits, etc. This
highlights VHDL's inherent extensible capabilities that are completely
lacking in Verilog.

If all you use is std_logic, std_logic_vector, or arrays of same,
there is negligible advantage to using VHDL over verilog. It is at
higher levels of abstraction, where design productivity is maximized,
that VHDL shines.

Untidy is in the eye of the beholder.

Andy

Andy <jonesandy@comcast.net> wrote:
(snip)
>> > any comments on either VHDL or &#4294967295;Verilog?

(snip)
> With the 2008 fixed point package, VHDL allows synthesizable fixed
> point arithmetic of arbitrary precision and binary point location. The
> arithmetic operators and types are defined to automatically handle
> mixed precision/point arithmetic for you. To the best of my knowledge,
> the Verilog language in its current form cannot support this
> capability at all.

An interesting idea, but note that, as far as I know, no computer
hardware has support for this, so it seems strange that an HDL
would need it. 

Yes you can do fixed point with different positions of the radix
point, PL/I and a small number of other languages do, but on hardware
that doesn't keep track of the radix point.

For multiply, you do need to keep all the product digits, so that
you can select the right ones based on the position of the product
radix point.

> Similarly, VHDL also has a floating point package that handles
> arbitrary sizes of data and exponent.

And that is synthesizable by anyone? 

> The fixed and floating point packages were demonstrated prior to 2008
> with no changes to the language required (that's the power of VHDL
> types and overloading), and the only 2008 features that the current
> packages use are package generics, to allow user specification of
> operator behaviors for rounding, saturation, guard bits, etc. This
> highlights VHDL's inherent extensible capabilities that are completely
> lacking in Verilog.

I suppose higher level of abstraction is nice, but does it really
help design real systems? 

> If all you use is std_logic, std_logic_vector, or arrays of same,
> there is negligible advantage to using VHDL over verilog. 

And maybe a slight disadvantage. It is a lot wordier to say
the same thing, more places to get it wrong.

> It is at higher levels of abstraction, where design 
> productivity is maximized, that VHDL shines.

Probaby depends on what kind of systems you design. 

Is it easier to design something like a pentium with a language that
has support for floating point? For real floating point systems, it
is usual to actually design the logic in the HDL. 

> Untidy is in the eye of the beholder.

-- glen

On Jan 30, 1:42=A0pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
> Andy <jonesa...@comcast.net> wrote:
>
> (snip)
>
> >> > any comments on either VHDL or =A0Verilog?
>
> (snip)
>
> > With the 2008 fixed point package, VHDL allows synthesizable fixed
> > point arithmetic of arbitrary precision and binary point location. The
> > arithmetic operators and types are defined to automatically handle
> > mixed precision/point arithmetic for you. To the best of my knowledge,
> > the Verilog language in its current form cannot support this
> > capability at all.
>
> An interesting idea, but note that, as far as I know, no computer
> hardware has support for this, so it seems strange that an HDL
> would need it.

Whaaaatttt???  What does your computer capabilities have to do with
your ASIC/FPGA designs?  Mixed precision/radix point arithmetic can be
very useful in an HDL design.  If you are just passing data and
controlling timing then maybe not.  But signal processing often has to
deal with the results of varying precision in operations.


> Yes you can do fixed point with different positions of the radix
> point, PL/I and a small number of other languages do, but on hardware
> that doesn't keep track of the radix point.

You seem to be thinking only of CPU designs.  HDL is used for a lot
more than CPU designs.


> For multiply, you do need to keep all the product digits, so that
> you can select the right ones based on the position of the product
> radix point.

Actually you need to keep the bits that are important to your
application.  That will vary.


> > Similarly, VHDL also has a floating point package that handles
> > arbitrary sizes of data and exponent.
>
> And that is synthesizable by anyone?

I haven't looked at the floating point package, but if it is described
in terms of basic operators in VHDL it should be synthesizable in
every tool.  That is the point of overloading.  You can define a
multiply operator for real data in terms of the basic building blocks
and this is now a part of the language.  VHDL is extensible that way.


> > The fixed and floating point packages were demonstrated prior to 2008
> > with no changes to the language required (that's the power of VHDL
> > types and overloading), and the only 2008 features that the current
> > packages use are package generics, to allow user specification of
> > operator behaviors for rounding, saturation, guard bits, etc. This
> > highlights VHDL's inherent extensible capabilities that are completely
> > lacking in Verilog.
>
> I suppose higher level of abstraction is nice, but does it really
> help design real systems?

Not if you refuse to consider it.


> > If all you use is std_logic, std_logic_vector, or arrays of same,
> > there is negligible advantage to using VHDL over verilog.
>
> And maybe a slight disadvantage. It is a lot wordier to say
> the same thing, more places to get it wrong.

Yes, VHDL is definitely wordier.  But then I never use
std_logic_vector or std_logic.  I use signed and unsigned which
provide so much more functionality... also provided by the
extensibility of VHDL I believe.


> > It is at higher levels of abstraction, where design
> > productivity is maximized, that VHDL shines.
>
> Probaby depends on what kind of systems you design.
>
> Is it easier to design something like a pentium with a language that
> has support for floating point? For real floating point systems, it
> is usual to actually design the logic in the HDL.

You seem to be very CPU focused.  For every Pentium type design done
in HDL there are what, thousands of other designs?


> > Untidy is in the eye of the beholder.
>
> -- glen

Rick

rickman <gnuarm@gmail.com> wrote:

(snip, someone wrote)
>> > With the 2008 fixed point package, VHDL allows synthesizable fixed
>> > point arithmetic of arbitrary precision and binary point location. 

(snip, I wrote)
>> An interesting idea, but note that, as far as I know, no computer
>> hardware has support for this, so it seems strange that an HDL
>> would need it.

> Whaaaatttt???  What does your computer capabilities have to do with
> your ASIC/FPGA designs?  Mixed precision/radix point arithmetic can be
> very useful in an HDL design.  If you are just passing data and
> controlling timing then maybe not.  But signal processing often has to
> deal with the results of varying precision in operations.

If it is useful in ASIC/FPGA designs, wouldn't it also be even more
useful in software running on commonly (or not so commonly) available
processors? Yet none have bothered to implement it.

It could be done in software, but none of the popular languages
have any support for fixed point non-integer arithmetic.

It was one of the fun things I did in PL/I so many years ago, though.

>> Yes you can do fixed point with different positions of the radix
>> point, PL/I and a small number of other languages do, but on hardware
>> that doesn't keep track of the radix point.

> You seem to be thinking only of CPU designs.  HDL is used for a lot
> more than CPU designs.

Well, more than CPU designs, I work on systolic arrays, but even
there so, it doesn't seem likely to help much. Will it generate
pipelined arithmetic units? Of all the things that I have to think
about in logic design, the position of the binary point is one of
the smallest.

>> For multiply, you do need to keep all the product digits, so that
>> you can select the right ones based on the position of the product
>> radix point.

> Actually you need to keep the bits that are important to your
> application.  That will vary.

And I don't expect the processor to help me figure out which
ones those are.

>> > Similarly, VHDL also has a floating point package that handles
>> > arbitrary sizes of data and exponent.
>>
>> And that is synthesizable by anyone?

> I haven't looked at the floating point package, but if it is described
> in terms of basic operators in VHDL it should be synthesizable in
> every tool.  That is the point of overloading.  You can define a
> multiply operator for real data in terms of the basic building blocks
> and this is now a part of the language.  VHDL is extensible that way.

Again, does it synthesize pipelined arithmetic units? If not, then
they aren't much use to anything I would work on. If I do it in
an FPGA that is because normal processors aren't fast enough.

But the big problem with floating point is that it takes too much logic.
The barrel shifter for pre/post normalization for an adder is huge.
(The actual addition, not so huge.) 

(snip)
>> I suppose higher level of abstraction is nice, but does it really
>> help design real systems?

> Not if you refuse to consider it.

(snip)
> You seem to be very CPU focused.  For every Pentium type design done
> in HDL there are what, thousands of other designs?

Well, it was supposed to be an example....

-- glen

davew <david.wooff@gmail.com> wrote:

>On Jan 29, 12:04=A0am, vsh <henry.val.sc...@gmail.com> wrote:
>> any comments on either VHDL or =A0Verilog?
>
>Can't comment on VHDL other than to say it always strikes me as
>difficult to decipher and untidy looking.  I'd be interested to know
>if there's anything useful that you can do in VHDL that you can't in
>Verilog.
>
>I'm a Verilog user and like the straight-forward syntax.  Like
>anything you can make a mess if you don't try hard enough not to.

IMHO Verilog is about describing hardware and VHDL is about describing
what it should do. VHDL has been good to me but it did take reading
some books and experimenting for me to unleash its real power. If you
overcome the stage where you describe hardware (thinking in 74' logic
chips) and start describing what a piece of logic should do you can do
a lot with just a few lines of VHDL by using functions, records, etc.

-- 
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
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