Forums

FPGA for large HDMI switch

Started by David Brown April 2, 2013
I am working on a project that will involve a large HDMI switch - up to
16 inputs and 16 outputs.  We haven't yet decided on the architecture,
but one possibility is to use one or more FPGAs.  The FPGAs won't be
doing much other than the switch - there is no video processing going on.

Each HDMI channel will be up to 3.4 Gbps (for HDMI 1.4), with 4 TMDS
pairs (3 data and 1 clock).  That means 64 pairs in, and 64 pairs out,
all at 3.4 Gbps.


Does anyone know of any FPGA families that might be suitable here?

I've had a little look at Altera (since I've used Altera devices
before), but their low-cost transceivers are at 3.125 Gbps - this means
we'd have to use their mid or high cost devices, and they don't have
nearly enough channels.  I don't expect the card to be particularly
cheap, but I'd like to avoid the cost of multiple top-range FPGA devices
- then it would be much cheaper just to have a card with 80 4-to-1 HDMI
mux chips.

Thanks for any pointers,

David
On Tuesday, April 2, 2013 8:27:07 AM UTC-7, David Brown wrote:
> I am working on a project that will involve a large HDMI switch - up to > > 16 inputs and 16 outputs. We haven't yet decided on the architecture, > > but one possibility is to use one or more FPGAs. The FPGAs won't be > > doing much other than the switch - there is no video processing going on. > > > > Each HDMI channel will be up to 3.4 Gbps (for HDMI 1.4), with 4 TMDS > > pairs (3 data and 1 clock). That means 64 pairs in, and 64 pairs out, > > all at 3.4 Gbps. > > > > > > Does anyone know of any FPGA families that might be suitable here? > > > > I've had a little look at Altera (since I've used Altera devices > > before), but their low-cost transceivers are at 3.125 Gbps - this means > > we'd have to use their mid or high cost devices, and they don't have > > nearly enough channels. I don't expect the card to be particularly > > cheap, but I'd like to avoid the cost of multiple top-range FPGA devices > > - then it would be much cheaper just to have a card with 80 4-to-1 HDMI > > mux chips. > > > > Thanks for any pointers, > > > > David
You cannot do what you desire in an FPGA, even if one existed with 64 high speed serdes at sufficient speed and cost. What you seek is a serial crosspoint switch. Look at vendors like Mindspeed.
On 04/04/13 21:08, Matt L wrote:
> On Tuesday, April 2, 2013 8:27:07 AM UTC-7, David Brown wrote: >> I am working on a project that will involve a large HDMI switch - >> up to >> >> 16 inputs and 16 outputs. We haven't yet decided on the >> architecture, >> >> but one possibility is to use one or more FPGAs. The FPGAs won't >> be >> >> doing much other than the switch - there is no video processing >> going on. >> >> >> >> Each HDMI channel will be up to 3.4 Gbps (for HDMI 1.4), with 4 >> TMDS >> >> pairs (3 data and 1 clock). That means 64 pairs in, and 64 pairs >> out, >> >> all at 3.4 Gbps. >> >> >> >> >> >> Does anyone know of any FPGA families that might be suitable here? >> >> >> >> I've had a little look at Altera (since I've used Altera devices >> >> before), but their low-cost transceivers are at 3.125 Gbps - this >> means >> >> we'd have to use their mid or high cost devices, and they don't >> have >> >> nearly enough channels. I don't expect the card to be >> particularly >> >> cheap, but I'd like to avoid the cost of multiple top-range FPGA >> devices >> >> - then it would be much cheaper just to have a card with 80 4-to-1 >> HDMI >> >> mux chips. >> >> >> >> Thanks for any pointers, >> >> >> >> David > > You cannot do what you desire in an FPGA, even if one existed with 64 > high speed serdes at sufficient speed and cost. What you seek is a > serial crosspoint switch. Look at vendors like Mindspeed. >
Thanks for that hint. I got another reply suggesting a crosspoint switch - I will look at Mindspeed too now. mvh., David
Matt, can you elaborate on why the OP cannot do this in an FPGA, if a suitable FPGA is available & cost-effective? 

I completely understand that it may be highly unlikely that it can be done in a cost-effective FPGA, but you excluded that as a reason in your reply.

Andy
You might consider to use 16 external receivers and 16 external transmitter=
s and use the FPGA to mux the databuses. There are some Rx/Tx that support =
DDR on the databuses, so this will get you 16pins per Rx/TX (12b+HD+VD+DE+C=
lk) x 32 =3D 512 Pins Total. There are at least low cost Cyclone IV that ha=
ve so many IOs (CE30/CE40).

But I have not checked if this DDR-style Rx/Tx are also available for HDMI1=
.4 and how this solution compares to this crosspoint switches.

Regards,

Thomas
On 08/04/13 17:58, thomas.entner99@gmail.com wrote:
> You might consider to use 16 external receivers and 16 external > transmitters and use the FPGA to mux the databuses. There are some > Rx/Tx that support DDR on the databuses, so this will get you 16pins > per Rx/TX (12b+HD+VD+DE+Clk) x 32 = 512 Pins Total. There are at > least low cost Cyclone IV that have so many IOs (CE30/CE40). > > But I have not checked if this DDR-style Rx/Tx are also available for > HDMI1.4 and how this solution compares to this crosspoint switches. > > Regards, > > Thomas >
Unfortunately, the numbers are bigger than that. HDMI receivers and transmitters that I have seen have SDR on the databus, but for HDMI1.4 that would be 36 lines at 340 Mbps. So for 16 channels in and 16 channels out, that would be 36*16*2 = 1152 pins, all running at 340 Mbps. That's a lot of pins - and even if we got an FPGA big enough, designing such a board and getting matched lengths on all the lines needed would be a serious effort. The crosspoint switches mentioned by another poster are one likely choice. The other realistic architecture is to use large numbers of 4-to-1 HDMI multiplexers.
Andy,

There are two approaches to doing this in an FPGA. The OP is looking at one=
 that would bring the TMDS and clock lines directly to the FPGA (assuming a=
ppropriate equalization / level shift / drivers on PCB). An FPGA cannot pro=
vide a simple crosspoint function internally, thus one would have to put 16=
 instances of HDMI RX and 16 instances of HDMI TX cores in the device and c=
reate the crosspoint in the fabric. My personal opinion is that the number =
of cores, the clocking resources, and logic required would make this a futi=
le exercise.

The second approach is mentioned by Thomas already. This at least keeps the=
 HDMI PHY and RX/TX stack out of the FPGA, but will require quite a bit of =
IO depending on OP needs.=20

To attempt either will require a large and costly FPGA, I think the OP will=
 find the crosspoints cheaper in the end.

-Matt=20

On 20/04/13 00:15, matt.lettau@gmail.com wrote:
> Andy, > > There are two approaches to doing this in an FPGA. The OP is looking > at one that would bring the TMDS and clock lines directly to the FPGA > (assuming appropriate equalization / level shift / drivers on PCB). > An FPGA cannot provide a simple crosspoint function internally, thus > one would have to put 16 instances of HDMI RX and 16 instances of > HDMI TX cores in the device and create the crosspoint in the fabric. > My personal opinion is that the number of cores, the clocking > resources, and logic required would make this a futile exercise. > > The second approach is mentioned by Thomas already. This at least > keeps the HDMI PHY and RX/TX stack out of the FPGA, but will require > quite a bit of IO depending on OP needs. > > To attempt either will require a large and costly FPGA, I think the > OP will find the crosspoints cheaper in the end. > > -Matt >
Yes, that's pretty much the same conclusion as we came to (after you and another off-list poster suggested crosspoints) - and we are now using such a crosspoint switch on the board. Thanks to all for their suggestions. David
Matt,

OK, it's an economic issue, not a technical issue.

Thanks,

Andy
On 22/04/13 20:27, jonesandy@comcast.net wrote:
> Matt, > > OK, it's an economic issue, not a technical issue. > > Thanks, > > Andy >
I think it's a bit of both - when looking at the numbers of I/O's needed, I don't think there are FPGA's big enough on the market. Had it been 8x8 rather than 16x16, it would perhaps have been an economic issue. But with 16x16, we would need 64 inputs at 3.4 Gpbs and 64 outputs at 3.4 Gpbs - I don't think there are any FPGAs that have that many high-speed channels. And if we use external encoder/decoder chips, the speeds per line are lower but we would need far more of them. Certainly in principle an FPGA can be used for an HDMI cross-point switch, but it seems that it is not a practical solution for such a big switch.