CPLD + CAN bus

"Aurelian Lazarut" <aurash@xilinx.com> wrote in message
news:cofagb$m5k1@cliff.xsj.xilinx.com...
> Hi Antti,
>
> Antti Lukats wrote:
>
> >"Falk Salewski" <salewski@informatik.rwth-aachen.de> wrote in message
> >news:310ihvF31ii5hU1@uni-berlin.de...
> >
> >
> >>Thanks for the reply!
> >>
> >>I realized four 8bit counters in the CPLD and just want to send this
> >>information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am
> >>
> >>
> >not
> >
> >
> >>thinking wether this is the optimal solution but if it is possible
without
> >>an aditional uC (Project at university)
> >>I will have a look if I can store enough information in the CPLD for the
> >>initialization of the SJA1000 chip...
> >>
> >>
> >
> >http://ww1.microchip.com/downloads/en/DeviceDoc/21801b.pdf
> >
> >Quiz: How many macrocells is needed to initialize MMC card (nonSPI mode)
and
> >configure and FPGA from bitstream file on the card?
> >
> >Answer: 20 PLD macrocells!
> >
> >http://www.openchip.org/bootx/xmsmmc.html
> >
> >
> No file system support (I assume) and no partition support. How do you
> write the bitstream as row data ?
> cheers,
> Aurash

KISS
:)
format the MMC card, then copy download.bit to the card! thats it. simple as
that.
if once written can be overwritten without the need to format the card.

Of course I do have some utilities to write directly to the card (in hidden
area) too, but those arent even necessary

Antti

Falk Salewski wrote:
> Thanks for the reply!
> 
> I realized four 8bit counters in the CPLD and just want to send this 
> information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am not 
> thinking wether this is the optimal solution but if it is possible without 
> an aditional uC (Project at university)
> I will have a look if I can store enough information in the CPLD for the 
> initialization of the SJA1000 chip...

  First, find some working SJA1000 software, in any uC family will do.
Search also for the 82C200, which is the older sibling
of the SJA1000.  Philips will probably have some 80C51 examples.
  Then, look to move that function into the CPLD.
To give your tutor some real numbers, assemble JUST the code for
init & simple Echo, and print the LINK MAP, to show how much RAM and 
CODE space is needed. [eg it might be 5 bytes of RAM, and 275 Bytes of Code]

  I think I saw recently a CAN controller [SJA1000 like], that could
as an option, 'wake up' in simple peripheral mode, IIRC using a Serial 
EE to config.  That would be another 'no code' alternative.

-jg

> 
> FalkS.
> 
> "Jim Granville" <no.spam@designtools.co.nz> schrieb im Newsbeitrag 
> news:mBCqd.13010$3U4.254093@news02.tsnz.net...
> 
>>Falk Salewski wrote:
>>
>>>Thank you very much for your reply.
>>>
>>>However what I am looking for is how difficult is it to connect a CPLD to 
>>>a CAN-controller chip like the SJA1000 
>>>http://www-eu3.semiconductors.com/pip/SJA1000.html
>>>and how many of the CPLD  resources  it takes to initialize/communicate 
>>>with this CAN-controller.
>>
>> You'll need to setup the registers [either a rom in the CPLD, or
>>a Serial EE holding the init values, to BUS], and then be able to poll 
>>messages, and manage TX packets (which come from where ?).
>>
>> All of these are not CPLD-centric tasks, so why not use a small uC 
>>instead  - or even better, choose a uC with CAN on chip ?
>> If you have the XC2C256 there already, needing > 128 MC for other tasks, 
>>then you could use a small portion, for SPI-SJA1000 bridge, and then use a 
>>small SPI uC for the CAN manager/init.
>> Philips LPC9xx or Silicon Labs C8051F33x series would do this, in tiny 
>>11-20pin packages.
>> -jg
>>
>>
> 
> 
> 

"Falk Salewski" <salewski@informatik.rwth-aachen.de> schrieb im Newsbeitrag
news:31038aF32l671U1@uni-berlin.de...
> Hello everybody,
>
> I want to connect a Xilinx CoolrunnerII (XC2c256) to the CAN-Bus. To make
it
> easy I would like to use a ready to use CAN-bus driver chip (as much of
the
> protocol implemented as possible). Any suggestions? How many of the CPLD

If you do so, use a uC with integrated CAN controller. But then you dont
need a CPLD anymore.
I dont see the point of using a CPLD with CAN. You CAN do it ;-) of cource.

Regards
Falk

"Falk Salewski" <salewski@informatik.rwth-aachen.de> schrieb im Newsbeitrag
news:310ihvF31ii5hU1@uni-berlin.de...
> Thanks for the reply!
>
> I realized four 8bit counters in the CPLD and just want to send this
> information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am
not
> thinking wether this is the optimal solution but if it is possible without
> an aditional uC (Project at university)

It CAN be doen this way, but

-- it is more expensive.
-- more complicated

Regards
Falk

"Antti Lukats" <antti@case2000.com> schrieb im Newsbeitrag
news:cofco1$b9n$05$1@news.t-online.com...

> KISS
> :)
> format the MMC card, then copy download.bit to the card! thats it. simple
as
> that.
> if once written can be overwritten without the need to format the card.

Nice trick, but Iam afraid the CAN bus protocoll is a LITTLE bit more
complex.

Regards
Falk

"Falk Brunner" <Falk.Brunner@gmx.de> wrote in message
news:311ckvF309jd8U8@uni-berlin.de...
>
> "Antti Lukats" <antti@case2000.com> schrieb im Newsbeitrag
> news:cofco1$b9n$05$1@news.t-online.com...
>
> > KISS
> > :)
> > format the MMC card, then copy download.bit to the card! thats it.
simple
> as
> > that.
> > if once written can be overwritten without the need to format the card.
>
> Nice trick, but Iam afraid the CAN bus protocoll is a LITTLE bit more
> complex.
>
> Regards
> Falk

LOL, yes just a little :)

well only wanted to point out that 256 cells PLDs SHOULD be large enough for
register init sequencer to initialize some CAN interface chip like MCP2515

antti

Falk Salewski wrote:
> Thanks for the reply!
> 
> I realized four 8bit counters in the CPLD and just want to send this 
> information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am not 
> thinking wether this is the optimal solution but if it is possible without 
> an aditional uC (Project at university)
> I will have a look if I can store enough information in the CPLD for the 
> initialization of the SJA1000 chip...

  If you change the SJA1000, to the Microchip MCP25020, that
has 8 I/O and on chip config registers so can 'wake up alive'.

  Simplest scheme to tranfer counter info, from a CPLD, would be
a nibble-ram map, where you allocate 4 of the I/O as Address, and
4io as read-back nibble.
  A Write-Read CAN transaction, then Sends Address, and recovers one 
firmly identified nibble, and 16 nibbles can map 8 bytes of info.

-jg