PCI in a PCI-X slot

I have a implemented a PCI 66Mhz master/target design on an Fpga, using
an IP core from one of the well known suppliers. The core does not
support PCI-X.

The card works fine in 33Mhz and 66Mhz PCI slots. However, it sometimes
fails to be seen by the PC when inserted in a PCI-X slot.

I drive the PCIXCAP and M66EN pins on the card from the Fpga to signal
that the card supports 66Mhz PCI but not PCI-X.

Here's my question.

On power-up, a PCI-X slot expects the card to wake up within 100ms,
whereas a PCI slot allows 2^25 clock ticks which is about 500ms. By the
time my Fpga wakes up (exits power-on reset and is configured) I'm
thinking that I might have missed the 100ms reset window? If I miss
that window, and the Fpga hasn't driven PCIXCAP to signal that the card
doesn't support PCI-X, then the PC won't see the card. Is that correct?

Now here's the complicated (to me) bit. If I power-cycle the PC, then
"sometimes" the card will be recognised. What I'm thinking is that
perhaps when the card wakes up after the 100ms window, the PC thinks a
66Mhz PCI card has been hot-plugged, and on power-down it stores that
information such that when the PC is switched back on it expects that
the PCI-X bus will have a conventional PCI card on it and therefore it
uses a 2^25 clock reset window.

Am I on the right track here at all?

I'm going to tie-off PCIXCAP on the board, rather than driving it from
the Fpga, and the same for M66EN.

I'm just wondering why the card sometimes works and sometimes doesn't.

All intelligent comments welcomed.

Alan

<amyler@eircom.net> schrieb im Newsbeitrag
news:1118998997.082942.110340@g49g2000cwa.googlegroups.com...
> I have a implemented a PCI 66Mhz master/target design on an Fpga, using
> an IP core from one of the well known suppliers. The core does not
> support PCI-X.
>
> The card works fine in 33Mhz and 66Mhz PCI slots. However, it sometimes
> fails to be seen by the PC when inserted in a PCI-X slot.
>
> I drive the PCIXCAP and M66EN pins on the card from the Fpga to signal
> that the card supports 66Mhz PCI but not PCI-X.
>
> Here's my question.
>
> On power-up, a PCI-X slot expects the card to wake up within 100ms,
> whereas a PCI slot allows 2^25 clock ticks which is about 500ms. By the
> time my Fpga wakes up (exits power-on reset and is configured) I'm
> thinking that I might have missed the 100ms reset window? If I miss
> that window, and the Fpga hasn't driven PCIXCAP to signal that the card
> doesn't support PCI-X, then the PC won't see the card. Is that correct?
>
> Now here's the complicated (to me) bit. If I power-cycle the PC, then
> "sometimes" the card will be recognised. What I'm thinking is that
> perhaps when the card wakes up after the 100ms window, the PC thinks a
> 66Mhz PCI card has been hot-plugged, and on power-down it stores that
> information such that when the PC is switched back on it expects that
> the PCI-X bus will have a conventional PCI card on it and therefore it
> uses a 2^25 clock reset window.
>
> Am I on the right track here at all?
>
> I'm going to tie-off PCIXCAP on the board, rather than driving it from
> the Fpga, and the same for M66EN.
>
> I'm just wondering why the card sometimes works and sometimes doesn't.
>
> All intelligent comments welcomed.
>
> Alan
>

well you answered yourself,

1 the M66EN and PCIXCAP should defenetly not be driven by FPGA but be
hardwired
2 there is no information stored on power down

when the PC doesnt see the card is it still visible as uninitialied card?

PCI card is accessed several times during boot up process, if you miss the
first accesses to it
then the card will not be enumerated but it would still show up if

just try PCIscope or PCItree to see if they see the card in those cases
where the OS doesnt
enumerate it

BTW there can by multiply resets, like resetting in PCI mode then quering
the PCIx capability list and resetting again.
but multiply resets can also be seen when no PCIx card is inserted.

also make sure that if any DCM are used then the logic clocked from DCM will
not mixup the PCI logic

I have a system with PCIx FPGA board and PCI FPGA board where I reconfigure
both devices 'live'
and reenable the bars after reconfiguration using special sw for it, it
saves a lot of time when you dont
need to reboot after FPGA reconfing

I tried to use ChipScope but unfortunatly chipscope ILA cores makes the PCIx
design to non working :(

but you can try to insert some smaller chipscope ILA and trace the reboot
process
(I used 128 bit wide ILA maybe that was too much)

antti