Xilinx V4 LVDS

Sean Durkin wrote:
> You either need to instantiate IBUFDS_LVDS25_DT in your HDL-Code
> (instead of just IBUFDS) or attach the IOSTANDARD-attribute to your
> IBUFs, with the value LVDS25_DT. The _DT switches on the differential
> termination.
Sorry, my mistake: it either must be a IBUFDS_LVDS_25_DT in the HDL or
the attribute value LVDS_25_DT. The link I posted earlier doesn't
mention V4, but it should be the same for that.

And I just read that there's a new attribute "DIFF_TERM" for V4, that
should work as well. You'd have to check the Xilinx Constraint Guide in
the ISE Documentation for that. I suppose you need to set it to "TRUE"
or something.

cu,
Sean

Are you running 8.1?

I still have 7.1 and PACE tells me I have thes LVDS options:
LVDS_25
LVDS_25_DCI
LVDSEXT_25
LVDSEXT_25_DCI

Brad


"Sean Durkin" <smd@despammed.com> wrote in message 
news:41gfgfF1dt07oU1@individual.net...
> Sean Durkin wrote:
>> You either need to instantiate IBUFDS_LVDS25_DT in your HDL-Code
>> (instead of just IBUFDS) or attach the IOSTANDARD-attribute to your
>> IBUFs, with the value LVDS25_DT. The _DT switches on the differential
>> termination.
> Sorry, my mistake: it either must be a IBUFDS_LVDS_25_DT in the HDL or
> the attribute value LVDS_25_DT. The link I posted earlier doesn't
> mention V4, but it should be the same for that.
>
> And I just read that there's a new attribute "DIFF_TERM" for V4, that
> should work as well. You'd have to check the Xilinx Constraint Guide in
> the ISE Documentation for that. I suppose you need to set it to "TRUE"
> or something.
>
> cu,
> Sean 

Well after all that what I needed
to do was to add some of these to the UCF file:

INST my_xn_ibufd_instantiation DIFF_TERM = TRUE;

That will turn on the differential resistor inside the chip.

What was confusing was how much signal got through
without the termination.

That UCF constraint has to be added to IBUFDs only.
I tried to add it to a wizard generated dcm with external
differential inputs and got an error. I wonder if Xilinx
knows about this.  But you can run the xclk into an
IBUFD, and run that output into an internal single-ended
dcm clock input, no problem. Probably cleaner that way
because it's broken down into primitives.

Thanks to Rob, Sean, and Avishay for helping me piece
the problem together.

Brad Smallridge
aivision.com



"Brad Smallridge" <bradsmallridge@dslextreme.com> wrote in message 
news:11r0jedsghr3me0@corp.supernews.com...
> Hello,
>
> Having trouble with some LVDS signals coming from a Camera Link interface. 
> I expect to see from steady signals coming from this line camera. DVAL=1. 
> But it's not there. And the LVAL, line valid, only comes on for maybe one 
> clock, and I expect it to come on for 2K clocks.
>
> I am using IBUFDS as inputs.  The UCF file loc the pins but that is all. 
> Do I need something more to drop the 100 ohm termination resitance?
>
> Brad Smallridge
> aivision.com
>