DCM spartan 3 variable frequency divider

Monica,
you can avoid the delay by clocking everything with the fast clock, and
using a 1-of-8 Clock Enable for the slow circuitry. That keeps
everything in the same clock domain. The only drawback is the higher
power consumption due to the wide distribution of the fast clock.

If almost everything runs at the slower clock, then it might make sense
to analyze carefully whether you can tolerate the skew between the fast
and the slow clock. Yes, you would use the third bit of a synchronous
counter as the slower clock. Do not even think about a ripple-counter
:-(
Since your "high" clock frequency is only 40 MHz, you can also
camouflage the clock skew by using the "other" edge of the 40 MHz
clock...
Frohes Neues Jahr!
Peter Alfke

Hallo Peter,

Danke sch=F6n,Ich wunshe Ihnen guten rutz ins neue Jahr.

Thank you very much,
Monica