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CAM, TCAM in Stratix

Started by freechip April 21, 2006
freechip wrote:
> Thanks a lot for your answers. > Actually, I can not tell you more about the size of the CAM. > You are talking about the size but did you implement cam in Altera > (Stratix?) because I didn't see it was possible to put cam in Stratix in > Altera's website. > Have a nice day. > > Freechip
Right, right. My apologies. I'm just so used to having embedded LUT-style memories available that I have trouble making the mindset switch to Altera. In Altera, CAMs suck (except maybe for way back in the 20K days). You can still use the embedded memories to build up a CAM in segments for a small number of entries. Using the 4k memories arranged as 256x16, you could build 16 CAMs in 8-bit segments. 16 CAM entries of 128 bits would take 16 4k RAM blocks and qty 16, 16-wide cascades to indicate a byte match for all 16 memories for one CAM entry. So it can be done but with significantly more resources than the 64 slices needed in an SRL or single-port LUT-RAM device.