Xilinx ise ml402 bram interface

I would like to be able to send and receive data on the fly to a Xilinx V4 
BRAM. I would communicate to the A port while the design under test would 
use the B port. (Or the other way around is OK to). A minimum of hardware 
would be nice. On this dev board there is an RS232 UART port, a USB2 port 
that goes through the Cypress part, an Ethernet port, the JTAG port, all of 
which seem to be OK fine candidates for an interface.

Can somebody tell me what is the easiest non-EDK path for me?

Brad Smallridge
aivision