FPGA multiplier

Rob wrote:
> Funny you should mention this.  We came across the same issue, but we found 
> out the limitations of the memory interface before we decided to spin 
> boards.  We ultimately went with an FPGA.  You can't be an FPGA for parallel 
> processing.  In our particular application an FPGA running at 67MHz out 
> performed the BlackFin running at 500MHz, all because of the FPGA's inherent 
> power of parallel processing.

No argument here. In this particular project we outsourced the hardware
design, but did all the software in house. We had limited time to review
the hardware designer's choice for chips -- he did some digging and we
were content to trust his instincts. Getting to the point where we would
have studied the datasheet in terms of memory bandwidth...there's just
no way we would have invested the time in that then. There would have
been an element of faith that AD would have designed their memory
controller efficiently.

Realistically their SDRAM controller seems to be just an afterthought.
I can't really see how it would be *that* hard to add in bursting...and
it would completely solve the bottlenecks...

Note AD = Analog Devices + this discussion is in regards to their
blackfin line of DSP products. Not really FPGA's. :)

-Dave

-- 
David Ashley                http://www.xdr.com/dash
Embedded linux, device drivers, system architecture