Hello, Just started recently playing with a VHDL-1993 compatible fixed-point package: http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/files.html After introducing minor modifications to the package, it compiled on Xilinx ISE 8.1 sp3. However, now no matter how I use the function "resize" in my code, I keep on getting this message: FATAL_ERROR:Xst:Portability/export/Port_Main.h:127:1.16 - This application has discovered an exceptional condition from which it cannot recover. Process will terminate. To resolve this error, please consult the Answers Database and other online resources at http://support.xilinx.com. If you need further assistance, please open a Webcase by clicking on the "WebCase" link at http://support.xilinx.com Process "Synthesize" failed Was wondering by any chance whether anybody in here managed to go around the issue. Any suggestions would be greatly appreciated. In the mean time, headache is inevitable in FPGAs, alas! Cheers, -Manny
IEEE fixed-point package FATAL_ERROR
Started by ●December 23, 2006