URGENT HELP NEEDED: LVDS

Hi everybody!
I felt in a very strange situation: I'm working with an FPGA BOARD:
 -2 Virtex-4LX
 -1 Quick LVDS bus between the 2 FPGAs.
 -1 INPUT from an external board.
 -1OUTPUT to the same external board.
I use for these quick interfaces ChipSync (Local clocking ressources
+ISERDES+OSERDES).
When I make my tests for the internal bus (the connection between the
2 FPGAs) I have no problems: >1Gb/s for each LVDS line.
Since the external board is not yet ready to use, I use a small
loopback board to connect the output of my board to the input of the
same boad (the FPGA board). This board INVERTS LVDS PAIRS ie: if I
have an output {XP,XN} I get the input {XN,XP}. ({A,B}=A on P pin and
B on N pin).
When I make the same tests it doesn't work even on small frequencies.
and the use of IDELAY DOESN'T HELP.

Please help me
Mehdi

"GaLaKtIkUsT" <taileb.mehdi@gmail.com> wrote in message
news:1174626985.784318.16210@n76g2000hsh.googlegroups.com...
>
> This board INVERTS LVDS PAIRS ie: if I
> have an output {XP,XN} I get the input {XN,XP}. ({A,B}=A on P pin and
> B on N pin).

1. I doubt anyone can understand your description above. Are you trying to
say that the wires are crossed on the board?
2. Use a scope.

/Mikhail

On Mar 23, 8:45 am, "MM" <m...@yahoo.com> wrote:
> "GaLaKtIkUsT" <taileb.me...@gmail.com> wrote in message
>
> news:1174626985.784318.16210@n76g2000hsh.googlegroups.com...
>
>
>
> > This board INVERTS LVDS PAIRS ie: if I
> > have an output {XP,XN} I get the input {XN,XP}. ({A,B}=A on P pin and
> > B on N pin).
>
> 1. I doubt anyone can understand your description above. Are you trying to
> say that the wires are crossed on the board?
> 2. Use a scope.
>
> /Mikhail

They are not crossed like X. the problem is the following if we try
(using the loop back board) to get P pin on P pin and N pin on N pin
we will be obliged to cross the wires (make an X on the board). To
avoid this the guy ho made that loopback board decided to send the P
to N and N to P and says that the only problem will the inversion of
the logic levels.
I reformulate my question in more simple terms:
I LVDS pins are crossed what would be the result? only inversion of
logic levels or more?
Mehdi

On Mar 23, 1:49 am, "GaLaKtIkUs=E2=84=A2" <taileb.me...@gmail.com> wrote:
> On Mar 23, 8:45 am, "MM" <m...@yahoo.com> wrote:
>
> > "GaLaKtIkUsT" <taileb.me...@gmail.com> wrote in message
>
> >news:1174626985.784318.16210@n76g2000hsh.googlegroups.com...
>
> > > This board INVERTS LVDS PAIRS ie: if I
> > > have an output {XP,XN} I get the input {XN,XP}. ({A,B}=3DA on P pin a=
nd
> > > B on N pin).
>
> > 1. I doubt anyone can understand your description above. Are you trying=
 to
> > say that the wires are crossed on the board?
> > 2. Use a scope.
>
> > /Mikhail
>
> They are not crossed like X. the problem is the following if we try
> (using the loop back board) to get P pin on P pin and N pin on N pin
> we will be obliged to cross the wires (make an X on the board). To
> avoid this the guy ho made that loopback board decided to send the P
> to N and N to P and says that the only problem will the inversion of
> the logic levels.
> I reformulate my question in more simple terms:
> I LVDS pins are crossed what would be the result? only inversion of
> logic levels or more?
> Mehdi


If the loop-back board crosses the wires, then I assume that
  out-N --> loop board --> in-P and out-P --> loop-board --> in-N.
If this is true, then yes, the signal is inverted.  Make a simple test
to verify this.
-Dave Pollum

GaLaKtIkUs™ wrote:
> On Mar 23, 8:45 am, "MM" <m...@yahoo.com> wrote:
>> "GaLaKtIkUsT" <taileb.me...@gmail.com> wrote in message
>>
>> news:1174626985.784318.16210@n76g2000hsh.googlegroups.com...
>>
>>
>>
>>> This board INVERTS LVDS PAIRS ie: if I
>>> have an output {XP,XN} I get the input {XN,XP}. ({A,B}=A on P pin and
>>> B on N pin).
>> 1. I doubt anyone can understand your description above. Are you trying to
>> say that the wires are crossed on the board?
>> 2. Use a scope.
>>
>> /Mikhail
> 
> They are not crossed like X. the problem is the following if we try
> (using the loop back board) to get P pin on P pin and N pin on N pin
> we will be obliged to cross the wires (make an X on the board). To
> avoid this the guy ho made that loopback board decided to send the P
> to N and N to P and says that the only problem will the inversion of
> the logic levels.
> I reformulate my question in more simple terms:
> I LVDS pins are crossed what would be the result? only inversion of
> logic levels or more?
> Mehdi

1) Are you using 8B10B or some similar coding?
2) use a scope

On Mar 23, 5:21 pm, John_H <newsgr...@johnhandwork.com> wrote:
> GaLaKtIkUs=E2=84=A2 wrote:
> > On Mar 23, 8:45 am, "MM" <m...@yahoo.com> wrote:
> >> "GaLaKtIkUsT" <taileb.me...@gmail.com> wrote in message
>
> >>news:1174626985.784318.16210@n76g2000hsh.googlegroups.com...
>
> >>> This board INVERTS LVDS PAIRS ie: if I
> >>> have an output {XP,XN} I get the input {XN,XP}. ({A,B}=3DA on P pin a=
nd
> >>> B on N pin).
> >> 1. I doubt anyone can understand your description above. Are you tryin=
g to
> >> say that the wires are crossed on the board?
> >> 2. Use a scope.
>
> >> /Mikhail
>
> > They are not crossed like X. the problem is the following if we try
> > (using the loop back board) to get P pin on P pin and N pin on N pin
> > we will be obliged to cross the wires (make an X on the board). To
> > avoid this the guy ho made that loopback board decided to send the P
> > to N and N to P and says that the only problem will the inversion of
> > the logic levels.
> > I reformulate my question in more simple terms:
> > I LVDS pins are crossed what would be the result? only inversion of
> > logic levels or more?
> > Mehdi
>
> 1) Are you using 8B10B or some similar coding?
> 2) use a scope

8B10B is not used.
using a scope is not possible!!

I rewrote my HDL code from the beggining and it worked. The problem
was in wrong use of OSERDES.
Now I'm transmitting at 16x1Gb/s.

Thank you for having taken time to answer
Mehdi