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Active-HDL 7.3 vs Modelsim 6.3d-PE (for Verilog/Systemverilog)

Started by talkb January 27, 2008
When I evaluated Active-HDL this past summer (7.2sp1), I liked the
user-interface more than Modelsim.  However, Aldec's Systemverilog support
was quite far behind Modelsim 6.2g.

Now, I was wondering how these two products compare, today.
Looking at Aldec's online manual, it seems Active-HDL 7.3 has caught up
with Modelsim PE.  (PE still supports some constructs that Aldec doesn't,
but Aldec has rudimentary support for classes.)

Performance-wise which is faster?  (Most likely, my decision is between
Active-HDL "Plus Edition" and Modelsim-PE.)

Any problems with the Smartmodel/LMTV interface? (This is standard
for Modelsim/PE, but a separate upgrade for Active-HDL Plus-Edition.)

And a final question.  I know that Xilinx/Altera's development-suite
officially support the Modelsim simulator.  For example, the Xilinx EDK
can autogenerate control-scripts and autolaunch a Modelsim session.
Does Active-HDL have the same level of integration with Xilinx/Altera's
development environment?



On Jan 27, 1:20 pm, "talkb" <no...@talkb.com> wrote:
> When I evaluated Active-HDL this past summer (7.2sp1), I liked the > user-interface more than Modelsim. However, Aldec's Systemverilog support > was quite far behind Modelsim 6.2g. > > Now, I was wondering how these two products compare, today. > Looking at Aldec's online manual, it seems Active-HDL 7.3 has caught up > with Modelsim PE. (PE still supports some constructs that Aldec doesn't, > but Aldec has rudimentary support for classes.) > > Performance-wise which is faster? (Most likely, my decision is between > Active-HDL "Plus Edition" and Modelsim-PE.) > > Any problems with the Smartmodel/LMTV interface? (This is standard > for Modelsim/PE, but a separate upgrade for Active-HDL Plus-Edition.) > > And a final question. I know that Xilinx/Altera's development-suite > officially support the Modelsim simulator. For example, the Xilinx EDK > can autogenerate control-scripts and autolaunch a Modelsim session. > Does Active-HDL have the same level of integration with Xilinx/Altera's > development environment?
Smartmodels are not standard with Modelsim-PE. You can get them, but it is an additional license at additional cost. Did someone tell you it was standard with PE? They are standard with SE. You can get a list of what each version of ModelSim supports here: http://www.model.com/products/products_comparison.asp Regards, John McCaskill
talkb wrote:

> Performance-wise which is faster? (Most likely, my decision is between > Active-HDL "Plus Edition" and Modelsim-PE.)
I would get eval versions of both vendors to see how each worked on my machine with my code, and which vendor was easier to deal with on licensing. -- Mike Treseler
"John McCaskill" <jhmccaskill@gmail.com> wrote in message 
news:17a49aef-994b-435f-a423-2f7ab0f8c89b@i3g2000hsf.googlegroups.com...
> Smartmodels are not standard with Modelsim-PE. You can get them, but > it is an additional license at additional cost. Did someone tell you > it was standard with PE? They are standard with SE. > > You can get a list of what each version of ModelSim supports here: > > http://www.model.com/products/products_comparison.asp
That is wierd -- I could have sworn the product-sheet showed PE with Smartmodel as a standard feature. Many of Xilinx's IP-blocks (Rocket I/O GTP, Virtex4/5 TEMAC, PowerPC) require a Smartmodel capable simulator -- I've used PE 6.3c to simulate several TEMAC/PowerPC based Xilinx FPGA designs. I was pretty sure PE supported Smartmodels, since I had to edit the modelsim.ini file to read in the Xilinx-provided Smartmodel/LMTV binaries. Or perhaps Xilinx used a special-wrapper, such that their sim-models look and act like conventional Verilog-PLI?
On Jan 27, 4:56 pm, "talkb" <no...@talkb.com> wrote:
> "John McCaskill" <jhmccask...@gmail.com> wrote in message > > news:17a49aef-994b-435f-a423-2f7ab0f8c89b@i3g2000hsf.googlegroups.com... > > > Smartmodels are not standard with Modelsim-PE. You can get them, but > > it is an additional license at additional cost. Did someone tell you > > it was standard with PE? They are standard with SE. > > > You can get a list of what each version of ModelSim supports here: > > >http://www.model.com/products/products_comparison.asp > > That is wierd -- I could have sworn the product-sheet showed PE with > Smartmodel > as a standard feature. > > Many of Xilinx's IP-blocks (Rocket I/O GTP, Virtex4/5 TEMAC, PowerPC) > require a Smartmodel capable simulator -- I've used PE 6.3c > to simulate several TEMAC/PowerPC based Xilinx FPGA designs. > > I was pretty sure PE supported Smartmodels, since I had to edit the > modelsim.ini file > to read in the Xilinx-provided Smartmodel/LMTV binaries. > Or perhaps Xilinx used a special-wrapper, such that their sim-models look > and act > like conventional Verilog-PLI?
You can use Smartmodels with ModelSim PE, you just need to get a license for it. Look in the license file on the computer that you used to see if it had a license. I use ModelSim PE with extra license for Smartmodels, mixed language support, and code coverage. Even with getting the extra licenses PE was much cheaper than SE. Most of the difference is because of using a dongle instead of a floating license. SE comes standard with a floating license. EDK supports ModelSim, and Cadence, but not Aldec. Regards, John McCaskill www.FasterTechnology.com
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"John McCaskill" <jhmccaskill@gmail.com> wrote in message =
news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com...=

> You can use Smartmodels with ModelSim PE, you just need to get a > license for it. Look in the license file on the computer that you used > to see if it had a license. I use ModelSim PE with extra license for > Smartmodels, mixed language support, and code coverage. Even with > getting the extra licenses PE was much cheaper than SE. Most of the > difference is because of using a dongle instead of a floating license. > SE comes standard with a floating license.
Modelsim/SE is a (ASIC) "sign-off grade" simulator -- it's more = expensive=20 for that reason alone, though cheaper than its competition (Synopsys = VCS, Cadence Incisive.) Once upon a time, Cadence made a desktop simulator product called "Verilog Desktop" -- it was priced to compete with Modelsim/PE, Aldec, = etc. But I'd guess Cadence didn't get any traction in the FPGA and desktop=20 simulation market, so they stopped after version 5.1 or so.
> EDK supports ModelSim, and Cadence, but not Aldec.
I did notice Xilinx's Library Compilation Wizard only gives two choices: Modelsim or NC-Sim. But Aldec's support page has downloadable = (precompiled) libraries for both ISE 9.2.04i and EDK 9.2i.02. I'm hoping this means Active-HDL is usable for EDK-simulation, even if Xilinx doesn't = officially sanction it. --------------------------------------- I downloaded and installed the Active-HDL 7.3 downloadable demo. Systemverilog support is almost nearly caught up with Modelsim/PE 6.3c. Of the many things I tried (which I KNOW work with PE 6.3c), most = worked. Unfortunately, there is 1 critical feature missing: package/endpackage Modelsim/PE has suppored packages for a while now (and actually, so does Altera Quartus II 7.2sp1.) On the plus-side, Active-HDL has some things that Modelsim doesn't: rudimentary support for class declaration, (intreface) clocking block I think Mentor groups these features into the Questasim license (for=20 Modelsim/SE), which means they won't be part of Modelsim/PE for the=20 forseeable future. ------=_NextPart_000_000D_01C8610D.2C7567A0 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <HTML><HEAD> <META http-equiv=3DContent-Type content=3D"text/html; = charset=3Diso-8859-1"> <META content=3D"MSHTML 6.00.6000.16587" name=3DGENERATOR> <STYLE></STYLE> </HEAD> <BODY bgColor=3D#ffffff background=3D""> <DIV><FONT face=3DCourier size=3D2>"John McCaskill" = &lt;jhmccaskill@gmail.com&gt;=20 wrote in message=20 news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com...= <BR>&gt;=20 You can use Smartmodels with ModelSim PE, you just need to get a<BR>&gt; = license=20 for it. Look in the license file on the computer that you used<BR>&gt; = to see if=20 it had a license.&nbsp; I use ModelSim PE with extra license for<BR>&gt; = Smartmodels, mixed language support, and code coverage.&nbsp; Even = with<BR>&gt;=20 getting the extra licenses PE was much cheaper than SE. Most of = the<BR>&gt;=20 difference is because of using a dongle instead of a floating = license.<BR>&gt;=20 SE comes standard with a floating license.<BR><BR>Modelsim/SE is a = (ASIC)=20 "sign-off grade" simulator -- it's more expensive <BR>for that reason = alone,=20 though cheaper than its competition (Synopsys VCS,<BR>Cadence=20 Incisive.)<BR><BR>Once upon a time, Cadence made a desktop simulator = product=20 called<BR>"Verilog Desktop" -- it was priced to compete with = Modelsim/PE, Aldec,=20 etc.<BR>But I'd guess Cadence didn't get any traction in the FPGA and = desktop=20 <BR>simulation market, so they stopped after version 5.1 or = so.<BR><BR>&gt; EDK=20 supports ModelSim, and Cadence, but not Aldec.<BR><BR>I did notice = Xilinx's=20 Library Compilation Wizard only gives two choices:<BR>Modelsim or = NC-Sim.&nbsp;=20 But Aldec's support page has downloadable (precompiled)<BR>libraries for = both=20 ISE 9.2.04i and EDK 9.2i.02.&nbsp; I'm hoping this means</FONT></DIV> <DIV><FONT face=3DCourier size=3D2>Active-HDL is usable for = EDK-simulation, even if=20 Xilinx doesn't officially</FONT></DIV> <DIV><FONT face=3DCourier size=3D2>sanction it.</FONT></DIV> <DIV><FONT face=3DCourier size=3D2></FONT>&nbsp;</DIV> <DIV><FONT face=3DCourier=20 size=3D2>---------------------------------------</FONT></DIV> <DIV><FONT face=3DCourier size=3D2></FONT>&nbsp;</DIV> <DIV><FONT face=3DCourier size=3D2>I downloaded and installed the = Active-HDL 7.3=20 downloadable demo.<BR>Systemverilog support is almost nearly caught up = with=20 Modelsim/PE 6.3c.<BR>Of the many things I tried (which I KNOW work with = PE=20 6.3c), most worked.</FONT></DIV> <DIV><FONT face=3DCourier size=3D2>Unfortunately, there is 1 critical = feature=20 missing: </FONT><FONT face=3DCourier = size=3D2>package/endpackage<BR>Modelsim/PE has=20 suppored packages for a while now (and actually, so does</FONT></DIV> <DIV><FONT face=3DCourier size=3D2>Altera Quartus II = 7.2sp1.)</FONT></DIV> <DIV><FONT face=3DCourier size=3D2><BR>On the plus-side, Active-HDL has = some things=20 that Modelsim doesn't:<BR>rudimentary support&nbsp;for&nbsp;class = declaration,=20 (intreface) clocking block<BR><BR>I think Mentor groups these features = into the=20 Questasim license (for </FONT></DIV> <DIV><FONT face=3DCourier size=3D2>Modelsim/SE),&nbsp;which means they = won't be part=20 of Modelsim/PE for the </FONT></DIV> <DIV><FONT face=3DCourier size=3D2>forseeable=20 future.<BR><BR></DIV></FONT></BODY></HTML> ------=_NextPart_000_000D_01C8610D.2C7567A0--
Hi,

talkb wrote:
> "John McCaskill" <jhmccaskill@gmail.com> wrote in message > news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com... > > You can use Smartmodels with ModelSim PE, you just need to get a > > license for it. Look in the license file on the computer that you used > > to see if it had a license. I use ModelSim PE with extra license for > > Smartmodels, mixed language support, and code coverage. Even with > > getting the extra licenses PE was much cheaper than SE. Most of the > > difference is because of using a dongle instead of a floating license. > > SE comes standard with a floating license. > > Modelsim/SE is a (ASIC) "sign-off grade" simulator -- it's more expensive > for that reason alone, though cheaper than its competition (Synopsys VCS, > Cadence Incisive.) > > Once upon a time, Cadence made a desktop simulator product called > "Verilog Desktop" -- it was priced to compete with Modelsim/PE, Aldec, etc. > But I'd guess Cadence didn't get any traction in the FPGA and desktop > simulation market, so they stopped after version 5.1 or so. > > > EDK supports ModelSim, and Cadence, but not Aldec. > > I did notice Xilinx's Library Compilation Wizard only gives two choices: > Modelsim or NC-Sim. But Aldec's support page has downloadable (precompiled) > libraries for both ISE 9.2.04i and EDK 9.2i.02. I'm hoping this means > Active-HDL is usable for EDK-simulation, even if Xilinx doesn't officially > sanction it. >
Xilinx works with VCS-MX also and probably all decent simulatorns on all platforms, we use it on AMDs running Solaris 10 where Xilinx is not supported, see below for supported simulators on Sparc Solaris 10! edaadm@brera $ compxlib -help sim Release 9.2.04i - COMPXLIB J.40 Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. -s <simulator> : Specify the name of the simulator for which the libraries are to be compiled. The valid simulator names are :- mti_se mti_pe vcs_mx vcs_mxi ncsim Also compiling is trivial in Verilog(just compile it), and in VHDL Xilinx has supplied a file named vhdl_analyze_order in the $XILINX/vhdl/src/XilinxCoreLib directory. /michael
On Jan 28, 5:52 pm, Michael Laajanen <michael_laaja...@yahoo.com>
wrote:
> Hi, > > > > talkb wrote: > > "John McCaskill" <jhmccask...@gmail.com> wrote in message > >news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com... > > > You can use Smartmodels with ModelSim PE, you just need to get a > > > license for it. Look in the license file on the computer that you used > > > to see if it had a license. I use ModelSim PE with extra license for > > > Smartmodels, mixed language support, and code coverage. Even with > > > getting the extra licenses PE was much cheaper than SE. Most of the > > > difference is because of using a dongle instead of a floating license. > > > SE comes standard with a floating license. > > > Modelsim/SE is a (ASIC) "sign-off grade" simulator -- it's more expensive > > for that reason alone, though cheaper than its competition (Synopsys VCS, > > Cadence Incisive.) > > > Once upon a time, Cadence made a desktop simulator product called > > "Verilog Desktop" -- it was priced to compete with Modelsim/PE, Aldec, etc. > > But I'd guess Cadence didn't get any traction in the FPGA and desktop > > simulation market, so they stopped after version 5.1 or so. > > > > EDK supports ModelSim, and Cadence, but not Aldec. > > > I did notice Xilinx's Library Compilation Wizard only gives two choices: > > Modelsim or NC-Sim. But Aldec's support page has downloadable (precompiled) > > libraries for both ISE 9.2.04i and EDK 9.2i.02. I'm hoping this means > > Active-HDL is usable for EDK-simulation, even if Xilinx doesn't officially > > sanction it. > > Xilinx works with VCS-MX also and probably all decent simulatorns on all > platforms, we use it on AMDs running Solaris 10 where Xilinx is not > supported, see below for supported simulators on Sparc Solaris 10! > > edaadm@brera $ compxlib -help sim > Release 9.2.04i - COMPXLIB J.40 > Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. > > -s <simulator> : Specify the name of the simulator for which the libraries > are to be compiled. The valid simulator names are :- > > mti_se mti_pe vcs_mx vcs_mxi ncsim > > Also compiling is trivial in Verilog(just compile it), and in VHDL > Xilinx has supplied a file named vhdl_analyze_order in the > $XILINX/vhdl/src/XilinxCoreLib directory. > > /michael
The OP asked what EDK supports, compxlib is part of ISE, not EDK. I am currently using EDK/ISE 8.1 8.2 and 9.1, and I see that ISE does support vcs, but EDK does not. I also use ModelSim but not Cadence. When I say that EDK supports ModelSim and Cadence, I mean two things. 1. For those simulators the SimGen tool will generate setup scripts for you from your EDK project that let you launch the simulator, compile the project, setup the display windows, and run the simulation. I think that this is a very nice feature, but if you prefer another simulator, you can of course do this yourself. 2. Xilinx presumably does quality assurance testing against the simulators that they say are supported, and will provide help if you have problems. To me this is the critical point. At least for ModelSim, Xilinx is very specific about which versions they support. In the case of EDK 8.2, they specify one specific release of ModelSim as the only supported version. We have tried running with other versions with mixed results. When we used the supported version, our test benches passed and matched what we saw in hardware. When we used other versions, some times we got the same results, some times we did not. If your setup is working for you, I don't blame you for not wanting to change it. But there is a difference between it works, and it is supported. Regards, John McCaskill www.FasterTechnology.com
"John McCaskill" <jhmccaskill@gmail.com> wrote in message 
news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com...
> You can use Smartmodels with ModelSim PE, you just need to get a > license for it. Look in the license file on the computer that you used > to see if it had a license. I use ModelSim PE with extra license for > Smartmodels, mixed language support, and code coverage. Even with > getting the extra licenses PE was much cheaper than SE. Most of the > difference is because of using a dongle instead of a floating license. > SE comes standard with a floating license.
Ok, I double-checked our license-server's license.dat file. The commented section indicated our company is licensed for "Modelsim-PE Plus" As far as I can tell, the actual license-increments are just 2 items: 1) msimpevlog (Verilog) 2) msimpe (VHDL) Nothing else 'special' in the license-file. Perhaps Modelsim allows a Verilog+VHDL combo license to subsitute for a Smartmodel license?
Hi John,

John McCaskill wrote:
> On Jan 28, 5:52 pm, Michael Laajanen <michael_laaja...@yahoo.com> > wrote: >> Hi, >> >> >> >> talkb wrote: >>> "John McCaskill" <jhmccask...@gmail.com> wrote in message >>> news:aa864ccf-655f-445e-9a68-a25979acbdc2@v67g2000hse.googlegroups.com...
<sniP>
>> Xilinx works with VCS-MX also and probably all decent simulatorns on all >> platforms, we use it on AMDs running Solaris 10 where Xilinx is not >> supported, see below for supported simulators on Sparc Solaris 10! >> >> edaadm@brera $ compxlib -help sim >> Release 9.2.04i - COMPXLIB J.40 >> Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. >> >> -s <simulator> : Specify the name of the simulator for which the libraries >> are to be compiled. The valid simulator names are :- >> >> mti_se mti_pe vcs_mx vcs_mxi ncsim >> >> Also compiling is trivial in Verilog(just compile it), and in VHDL >> Xilinx has supplied a file named vhdl_analyze_order in the >> $XILINX/vhdl/src/XilinxCoreLib directory. >> >> /michael > > The OP asked what EDK supports, compxlib is part of ISE, not EDK. I > am currently using EDK/ISE 8.1 8.2 and 9.1, and I see that ISE does > support vcs, but EDK does not. I also use ModelSim but not Cadence. >
Ops, my misstake!
> When I say that EDK supports ModelSim and Cadence, I mean two things. > > 1. For those simulators the SimGen tool will generate setup scripts > for you from your EDK project that let you launch the simulator, > compile the project, setup the display windows, and run the > simulation. I think that this is a very nice feature, but if you > prefer another simulator, you can of course do this yourself. > > 2. Xilinx presumably does quality assurance testing against the > simulators that they say are supported, and will provide help if you > have problems. To me this is the critical point. > > At least for ModelSim, Xilinx is very specific about which versions > they support. In the case of EDK 8.2, they specify one specific > release of ModelSim as the only supported version. We have tried > running with other versions with mixed results. When we used the > supported version, our test benches passed and matched what we saw in > hardware. When we used other versions, some times we got the same > results, some times we did not.
You are ofcourse right. My experience with simulator versions not working is often connected to improper code in the libraries which some tools ignores or interpret it as they like, just like syntheses tools for some vendors. I have run lint tools on many of these libraries and they are not that well written, my experience is that unless one "relaxes" the compiler it usually works. And when filed a bug, the respons can often be "not supported simulator/version) although the code is not correct, that pisses me off alot (: But then again, if you want a easy supported tool chain, the "builtin" is the way to go just like you say. regards Michael