FPGARelated.com
Forums

Spartan 3 - avaliable in small quantities?

Started by Thomas Heller February 20, 2004
I have read several posts here about the difficulties to get Spartan 3
parts in small quantities.

Is it realistic to start a project using spartan 3 (actually the XC3S50
in the VQ100 package is what I probably want to use) when I only need
small quantities - starting with getting some 10 samples, in full
production lets say 100 to 500 pieces per year?

Thanks for opinions,

Thomas
I would suggest that past history of Xilinx should be taken here you won't
get any for a year after the announcement!
there aren't any unless you have a spare million so don't bother asking :-)


"Thomas Heller" <theller@python.net> wrote in message
news:65e1twtj.fsf@python.net...
> I have read several posts here about the difficulties to get Spartan 3 > parts in small quantities. > > Is it realistic to start a project using spartan 3 (actually the XC3S50 > in the VQ100 package is what I probably want to use) when I only need > small quantities - starting with getting some 10 samples, in full > production lets say 100 to 500 pieces per year? > > Thanks for opinions, > > Thomas
>Is it realistic to start a project using spartan 3 (actually the XC3S50 >in the VQ100 package is what I probably want to use) when I only need >small quantities - starting with getting some 10 samples, in full >production lets say 100 to 500 pieces per year?
Where would you buy them? What do they say? Can you get samples now? Are there any features on the Spartan 3 that you absolutely need? (Can you use some other chip?) What are the costs of alternatives? What are the costs of not being able to get the chips when you need them? How long is it going to take you to do the design? (When do you absolutely need the samples?) Can you work on the design with two plans in mind and make the choice a month or two from now? My rule of thumb is to not design in a chip unless I have parts in hand or a distributor has stock that I'm sure I can get. If an interesting chip has some features that would make a project a lot better (or even possible), then you have to decide if you want to stick your neck out. Do you like fighting with not-quite-debugged tools? Do you have good contacts at the vendor? -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.
On Fri, 20 Feb 2004 19:44:40 +0100, Thomas Heller wrote:

> I have read several posts here about the difficulties to get Spartan 3 > parts in small quantities. > > Is it realistic to start a project using spartan 3 (actually the XC3S50 > in the VQ100 package is what I probably want to use) when I only need > small quantities - starting with getting some 10 samples, in full > production lets say 100 to 500 pieces per year? > > Thanks for opinions, > > Thomas
Spartan 3s are hard to get but they are available, I'm using XC3S400s in a new design and we were able to get sample quantities. If you are just starting the project put your sample order in now, the lead times are long. My client waited until a week before the boards showed up and they ended up having to buy the parts from a broker on the other side of the world. I wouldn't worry about production quantities, Xilinx claims their yields are good. The problem is that demand unexpectedly spiked so there is a shortage this quarter.
Hal Murray wrote:
> > >Is it realistic to start a project using spartan 3 (actually the XC3S50 > >in the VQ100 package is what I probably want to use) when I only need > >small quantities - starting with getting some 10 samples, in full > >production lets say 100 to 500 pieces per year? > > Where would you buy them? What do they say? Can you get > samples now? > > Are there any features on the Spartan 3 that you absolutely need? > (Can you use some other chip?) > > What are the costs of alternatives? What are the costs of > not being able to get the chips when you need them? > > How long is it going to take you to do the design? (When > do you absolutely need the samples?) Can you work on the > design with two plans in mind and make the choice a month > or two from now? > > My rule of thumb is to not design in a chip unless I have parts > in hand or a distributor has stock that I'm sure I can get. > > If an interesting chip has some features that would make a > project a lot better (or even possible), then you have to decide > if you want to stick your neck out. Do you like fighting with > not-quite-debugged tools? Do you have good contacts at the vendor?
I don't know that the Spartan 3 parts are a major step forward in FPGAs. From what I can see, the main difference is the elimination of the huge startup currents on power up. The marketing claim is that these will be much cheaper parts because of the small die. But so far, I don't think anyone has seen the results of this. If you design in a Spartan 3 based on quoted pricing today, you are not likely to see that price drop at any time through the life cycle of the part. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
rickman wrote:

> I don't know that the Spartan 3 parts are a major step forward in > FPGAs. From what I can see, the main difference is the elimination of > the huge startup currents on power up. The marketing claim is that > these will be much cheaper parts because of the small die. But so far, > I don't think anyone has seen the results of this. > > --
I don't know about that, Xilinx initially set expectations low except on price. I heard Microblaze only ran at 85MHz on it compared to 120MHz or more on bigger Virtex. But on a cpu project I am working on I am seeing synth reports of 311MHz on sp3-5 with the latest speed file v 320Mhz for v2pro-8 and the -7s seem to be same speed as sp3-5 IIRC. The sp2-4s are way down to 120MHz. Seems as if its v2 made dirt cheap (if and when we get them) with a small cut in speed. Also the LUT counts are similar to sp2 but the blockrams are 4x bigger. I can still port back to sp2(e) with almost same floor plan but with much smaller ram instances although lots of 4ks could still be more usefull than equiv no of 16/18Ks but the speed cut would hurt. For an oldtime VLSI guy, I couldn't imagine getting such performance on an ASIC flow without 100x the design resources. johnjakson_usa_com
On Sun, 22 Feb 2004 07:14:16 -0800, john jakson wrote:

> rickman wrote: > >> I don't know that the Spartan 3 parts are a major step forward in >> FPGAs. From what I can see, the main difference is the elimination of >> the huge startup currents on power up. The marketing claim is that >> these will be much cheaper parts because of the small die. But so far, >> I don't think anyone has seen the results of this. >> >> -- > > > I don't know about that, Xilinx initially set expectations low except > on price. I heard Microblaze only ran at 85MHz on it compared to > 120MHz or more on bigger Virtex. > > But on a cpu project I am working on I am seeing synth reports of > 311MHz on sp3-5 with the latest speed file v 320Mhz for v2pro-8 and > the -7s seem to be same speed as sp3-5 IIRC. The sp2-4s are way down > to 120MHz. Seems as if its v2 made dirt cheap (if and when we get > them) with a small cut in speed. Also the LUT counts are similar to > sp2 but the blockrams are 4x bigger. > > I can still port back to sp2(e) with almost same floor plan but with > much smaller ram instances although lots of 4ks could still be more > usefull than equiv no of 16/18Ks but the speed cut would hurt. > > For an oldtime VLSI guy, I couldn't imagine getting such performance > on an ASIC flow without 100x the design resources. > > johnjakson_usa_com
John, I'd check your report files closely if I were you. If you are seeing 311MHZ on a Spartan 3 something is very wrong. I suspect that your synthesizer discarded most of your design. My experience sith Spartan XC3S400-4s is that they are much slower than Virtex2Ps (-5 is the V2P that I'm comparing it to). I'm able to get the Spartan 3s to meet 140MHz timing but that is with very few logic levels between pipeline stages. I'm sure that with lots of floorplanning it would be possible to push it higher than that but certainly not to 300MHz, especially not on something as complex as a CPU.
john jakson wrote:
> > rickman wrote: > > > I don't know that the Spartan 3 parts are a major step forward in > > FPGAs. From what I can see, the main difference is the elimination of > > the huge startup currents on power up. The marketing claim is that > > these will be much cheaper parts because of the small die. But so far, > > I don't think anyone has seen the results of this. > > > > -- > > I don't know about that, Xilinx initially set expectations low except > on price. I heard Microblaze only ran at 85MHz on it compared to > 120MHz or more on bigger Virtex. > > But on a cpu project I am working on I am seeing synth reports of > 311MHz on sp3-5 with the latest speed file v 320Mhz for v2pro-8 and > the -7s seem to be same speed as sp3-5 IIRC. The sp2-4s are way down > to 120MHz. Seems as if its v2 made dirt cheap (if and when we get > them) with a small cut in speed. Also the LUT counts are similar to > sp2 but the blockrams are 4x bigger.
I don't know why you would not expect the XC3S parts to be faster than the XC2S parts. Certainly going with a 2x reduction in feature size (or close to it) *should* give you a huge increase in speed. In fact, they should outrun everything Xilinx makes given the feature size. But they cut a lot of corners to make the parts cheap so they don't follow the curve. So far, I have not seen the prices beat the older Spartan parts either. Sure, they are an improvement, but in this industry, improvement is normal and part of the game. But the XC3S parts seem to be just the next new chip, not anything really special. If the XC3S parts were both faster than the Virtex line and cheaper than the older Spartan line, *that* would be something to crow about. But they are *neither* at the moment. They are just the standard improved line that combines both (more or less).
> I can still port back to sp2(e) with almost same floor plan but with > much smaller ram instances although lots of 4ks could still be more > usefull than equiv no of 16/18Ks but the speed cut would hurt. > > For an oldtime VLSI guy, I couldn't imagine getting such performance > on an ASIC flow without 100x the design resources.
-- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
"B. Joshua Rosen" <bjrosen@polybus.com> wrote in message news:<pan.2004.02.22.16.31.34.651568@polybus.com>...
> On Sun, 22 Feb 2004 07:14:16 -0800, john jakson wrote: > > > rickman wrote: > > > >> I don't know that the Spartan 3 parts are a major step forward in > >> FPGAs. From what I can see, the main difference is the elimination of > >> the huge startup currents on power up. The marketing claim is that > >> these will be much cheaper parts because of the small die. But so far, > >> I don't think anyone has seen the results of this. > >> > >> -- > > > > > > I don't know about that, Xilinx initially set expectations low except > > on price. I heard Microblaze only ran at 85MHz on it compared to > > 120MHz or more on bigger Virtex. > > > > But on a cpu project I am working on I am seeing synth reports of > > 311MHz on sp3-5 with the latest speed file v 320Mhz for v2pro-8 and > > the -7s seem to be same speed as sp3-5 IIRC. The sp2-4s are way down > > to 120MHz. Seems as if its v2 made dirt cheap (if and when we get > > them) with a small cut in speed. Also the LUT counts are similar to > > sp2 but the blockrams are 4x bigger. > > > > I can still port back to sp2(e) with almost same floor plan but with > > much smaller ram instances although lots of 4ks could still be more > > usefull than equiv no of 16/18Ks but the speed cut would hurt. > > > > For an oldtime VLSI guy, I couldn't imagine getting such performance > > on an ASIC flow without 100x the design resources. > > > > johnjakson_usa_com > > John, > > I'd check your report files closely if I were you. If you are seeing > 311MHZ on a Spartan 3 something is very wrong. I suspect that your > synthesizer discarded most of your design. My experience sith Spartan > XC3S400-4s is that they are much slower than Virtex2Ps (-5 is the V2P that > I'm comparing it to). I'm able to get the Spartan 3s to meet 140MHz timing > but that is with very few logic levels between pipeline stages. I'm sure > that with lots of floorplanning it would be possible to push it higher > than that but certainly not to 300MHz, especially not on something as > complex as a CPU.
Hi Rick I know what you are saying. When I first presented my paper cpu architecture to XST, the situation looked hopeless. I backed of and built a no of test projects that only included 1 object that was pushed to the max bringing all IOs to the pads. The synth reports are then crystal clear even for someone with little exp of the tool before. I also look at the layout and placement to see if it looks kosher. It did. From that I had a feel for what each Xilinx device
"B. Joshua Rosen" <bjrosen@polybus.com> wrote in message news:<pan.2004.02.22.16.31.34.651568@polybus.com>...
> On Sun, 22 Feb 2004 07:14:16 -0800, john jakson wrote: > > > rickman wrote: > > > >> I don't know that the Spartan 3 parts are a major step forward in > >> FPGAs. From what I can see, the main difference is the elimination of > >> the huge startup currents on power up. The marketing claim is that > >> these will be much cheaper parts because of the small die. But so far, > >> I don't think anyone has seen the results of this. > >> > >> -- > > > > > > I don't know about that, Xilinx initially set expectations low except > > on price. I heard Microblaze only ran at 85MHz on it compared to > > 120MHz or more on bigger Virtex. > > > > But on a cpu project I am working on I am seeing synth reports of > > 311MHz on sp3-5 with the latest speed file v 320Mhz for v2pro-8 and > > the -7s seem to be same speed as sp3-5 IIRC. The sp2-4s are way down > > to 120MHz. Seems as if its v2 made dirt cheap (if and when we get > > them) with a small cut in speed. Also the LUT counts are similar to > > sp2 but the blockrams are 4x bigger. > > > > I can still port back to sp2(e) with almost same floor plan but with > > much smaller ram instances although lots of 4ks could still be more > > usefull than equiv no of 16/18Ks but the speed cut would hurt. > > > > For an oldtime VLSI guy, I couldn't imagine getting such performance > > on an ASIC flow without 100x the design resources. > > > > johnjakson_usa_com > > John, > > I'd check your report files closely if I were you. If you are seeing > 311MHZ on a Spartan 3 something is very wrong. I suspect that your > synthesizer discarded most of your design. My experience sith Spartan > XC3S400-4s is that they are much slower than Virtex2Ps (-5 is the V2P that > I'm comparing it to). I'm able to get the Spartan 3s to meet 140MHz timing > but that is with very few logic levels between pipeline stages. I'm sure > that with lots of floorplanning it would be possible to push it higher > than that but certainly not to 300MHz, especially not on something as > complex as a CPU.
Hi Rick I know what you are saying. When I first presented my paper cpu architecture to XST, the situation looked hopeless. I backed of and built a no of test projects that only included 1 object that was pushed to the max bringing all IOs to the pads. The synth reports are then crystal clear even for someone with little exp of the tool before. I also look at the layout and placement to see if it looks kosher. It did. From that I had a feel for what each Xilinx device