Xilinx EDK 10.1 - SDRAM access using MPMC/VFBC by peripheral

Started by Unknown April 8, 2009
Hello all, i try to make an accelerator that will share the SDRAM with
Microblaze using a VFBC port on the MPMC. I use the Spartan 3E Starter
Kit and XPS 10.1.

So, I created a core with the wizard, it has a FSL bus and I also
created a VFBC bus too.

For the first test, I try to write 32 bytes to the SDRAM when the
processor sends a "1" through the FSL and verify the operation by
reading them later with Microblaze.

The VHDL code is here:
the MPD is here:

With the command words being
0x0000002 (X length, 32 bytes)
0x8000000 (Write operation, start address 0)
0x0000000 (only 1 Y line)
0x0000002 (stride, doesn't really matter here I think)
So, I expect it to write some bytes to the first 32 physical positions
on the SDRAM...

...but it doesn't. I added some output ports to debug it, and my
devices output waveforms are exactly as mentioned in the manual
- page 106)

Anybody has any idea as to what could be wrong here? Maybe i don't
reset the bus as I should? Or give it a wrong clock? I couldn't sort
that out using the manual... Perhaps someone could give me a starting
point to find for what's going wrong?

Thanks in advance,
Chris Gentsos
correction on the command words:

0x00000020 (X length, 32 bytes)
0x80000000 (Write operation, start address 0)
0x00000000 (only 1 Y line)
0x00000020 (stride, doesn't really matter here I think)