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UART testbench debug

Started by uche June 23, 2009
I am using the following code to test the Ken Chapman's UART. When I
run the following code and see the FIFO data  at the 'command' output,
I do not get 'A' as intended by the design. Instead, I get some other
bit patterns that doesn't make sense. Can anyone see what I am doing
wrong with the testbench. Also, I am assuming that I do not need to
tamper with the underlying Ken Chapman UART!

module behavioural_UART_Tx

#(parameter bit_time = 104000) // nanoseconds @ 9600 bps
  (output reg line);

initial
    line = 1'b1;  // line idles true

	 task send(input [7:0] data);
    reg [9:0] uart_frame;
    begin
// construct the whole frame with start and stop bit
      //            STOP  data  START
      uart_frame = {1'b1, data, 1'b0};
      repeat (10)     // number of bit-symbols to send
      begin
        line = uart_frame[0];   // drive line to correct level
        uart_frame = uart_frame >> 1;  // prepare next bit
        #(bit_time);            // hold output for one bit time
      end
    end
endtask

endmodule


module TB;

  wire line;
  // And any other signals you need for your DUT
  // such as clock, reset, data-bus...
  reg clk;
  reg xreset;
  wire buffer_full;
  wire present;
  wire baud;
  wire [7:0] command;

  // And any clock generators, etc...
  // declared inside RX and TX module
  always #3.2 clk = ~clk; //155.52 Mhz input

  // Here's the UART signal generator...
  behavioural_UART_Tx DUT0(.line(line));

  Top_Rx DUT1(
  .serial_in(line),
  .data_out_rx(command),
  .read_buffer_rx(1'b0), //read buffer enabled
  .en_16_x_baud(baud),
  .clk(clk),
  .buffer_present_rx(present),
  .buffer_full_rx(buffer_full),
  .xreset(xreset));

  baud_timer DUT2(
  .clk(clk),
  .reset(xreset),
  .en_16_x_baud(baud));

  initial begin: StimGen
    // Hang around for a while...
	 clk = 0;
	 //reset_buffer = 1;
	 #50;
	 xreset = 1;
	 #50 xreset = 0;

    // Use the Tx model to send a few characters to the DUT:
    #200000;
    DUT0.send("B"); //reset device
    // Idle awhile:
    #200000;
    // Send a newline character (LF = 10)
    //tx_model.send(10);
  end
endmodule
Hi
try to send the value in HEX, I had the same problem trying sending ASCII
but it not work

constant dato1 : std_logic_vector(7 downto 0) := X"44";--VHDL code,
transmit a D out the UART RS232

JP


On Sep 10, 4:02=A0am, "jaimico" <p_jai...@hotmail.com> wrote:
> Hi > try to send the value in HEX, I had the same problem trying sending ASCII > but it not work > > constant dato1 : std_logic_vector(7 downto 0) :=3D X"44";--VHDL code, > transmit a D out the UART RS232 > > JP
Do you have a `timescale directive appropriately placed? Are you sure you're in ns? You probably want something like `timescale 1 ns / 10 ps John Providenza