Learning VHDL - Basics
Enrico Garante walks through a compact, hands-on introduction to VHDL and Xilinx ISE, using the affordable Basys2 board. The tutorial explains entity versus architecture, the IEEE.STD_LOGIC_1164 types, and how to write a process with a sensitivity list to implement a simple AND gate. A short ISim video demo shows project creation and simulation so you can verify designs before programming the board.
Learning VHDL - Basics
Enrico Garante walks through a compact, hands-on introduction to VHDL and Xilinx ISE, using the affordable Basys2 board. The tutorial explains entity versus architecture, the IEEE.STD_LOGIC_1164 types, and how to write a process with a sensitivity list to implement a simple AND gate. A short ISim video demo shows project creation and simulation so you can verify designs before programming the board.
Learning VHDL - Basics
Enrico Garante walks through a compact, hands-on introduction to VHDL and Xilinx ISE, using the affordable Basys2 board. The tutorial explains entity versus architecture, the IEEE.STD_LOGIC_1164 types, and how to write a process with a sensitivity list to implement a simple AND gate. A short ISim video demo shows project creation and simulation so you can verify designs before programming the board.
