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Updated Stratix II Power Specs & Explanation

Started by Paul Leventis February 14, 2005
Paul,

To save you the embarrasment, I sent my reply to you directly.

Austin

Paul Leventis (at home) wrote:

>>I am sorry, but you have never run a spice simulation of midox pass >>transistor vs thin ox. > > > I am sorry Austin, but how exactly is it that increasing oxide thickness > does not decrease transistor speed? Increased tox = decreased beta = > decrease Ids. And the Vt increases with tox too, unless you adjust the > implant levels for those transistors (at the expensive of another mask and > processing step). If there were truely no speed implications of using > thicker oxide transistors, we'd all be using thick oxide transistors > everywhere and bragging about are "Single Gate Oxide" technologies!. > > There are places where slower transistors (be it longer gates, higher Vt, or > thicker oxide) are more tolerable than others. For example, the > configuration rams (no impact on speed). Are the pass gates one of those > places? Maybe -- depends on speed vs. leakage goals and the exact result > you get from your sim. Arguing that there is no speed loss and no > complexity increase whatsoever though is silly. > > Regards, > > Paul Leventis > Altera Corp. > >