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Need help to understand: Efficient Multi-Ported Memories for FPGAs

Started by Weng Tianxiang January 14, 2019
On Tuesday, January 15, 2019 at 7:11:39 AM UTC-8, Weng Tianxiang wrote:
> Hi, > > Here is my perfect answer to my question in VHDL and it has one copy and is capable for doing N writes and N reads at the same time: > > signal R0, R1, ..., Rn_1 : std_logic_vector(BITS-1 downto 0); > type NR_NW_TYPE : (0 to N-1) of unsigned(BITS-1 downto 0); > alias NR_NW : NR_NW_TYPE := (R0, R1, ..., Rn_1); > > Now one can do N writes to any data and N reads from any data of NR_NW on the same cycle. > > A1 <= NR_NW(j); --> A1 <= Rj; > > NR_NW(j) <= B1; --> Rj <= B1; > > Weng
There are no limits on the number of reading and writing: If 2 writes are for the same address one must arrange them in a same if-statement. Weng
On Monday, January 14, 2019 at 12:54:36 PM UTC-7, Weng Tianxiang wrote:
> Hi, > > I cannot understand the following paper: > "Efficient Multi-Ported Memories for FPGAs" > > http://www.eecg.toronto.edu/~steffan/papers/laforest_fpga10.pdf > > FPGA has a structure with 1 write port and 2 read port memory block: 2 memory blocks sharing the same write port and each of 2 blocks can be read individually by 2 different read. > > The paper essence for 2 write ports and 2 read ports is: > There are 2 memory blocks each having 1 write port and 2 read ports. > > The 2 memory blocks provide 2 write ports to write independently. > > There is another memory block, called LVT (Live Value Table), with 2 write ports and 2 read ports, each cell of which stores the port number which holds the latest write data. > > Example: > > simultaneously: > Write through port 1 with address 3; --- no problem > > Write through port 0 with address 2; > > simultaneously: > 0 --> LVT(2); > 1 --> LVT(3); --- how can it write 2 cells of a memory at the same cycle? > > If above 2 simultaneously write operation are feasible, 2 read operations can read from LVT first to get proper port number, and then get the correct latest data read from the port number. > > Thank you. > > Weng
There is another thread on this topic: https://groups.google.com/forum/#!searchin/comp.arch.fpga/quad-port%7Csort:date/comp.arch.fpga/Xrj3m2V2GyY/t_MX_tf_DwAJ I have a diagram here which shows how to make a 4-port RAM (2 writes, 2 reads) that keeps the semaphores in blockRAMs: https://imgur.com/a/NhNr0 The diagram might be easier to understand than a long explanation.
On Monday, January 14, 2019 at 4:38:35 PM UTC-7, Rob Gaddi wrote:
> On 1/14/19 1:22 PM, HT-Lab wrote: > > On 14/01/2019 19:54, Weng Tianxiang wrote: > >> Hi, > >> > >> I cannot understand the following paper: > >> "Efficient Multi-Ported Memories for FPGAs" > >> > >> http://www.eecg.toronto.edu/~steffan/papers/laforest_fpga10.pdf > >> > >> FPGA has a structure with 1 write port and 2 read port memory block: 2 > >> memory blocks sharing the same write port and each of 2 blocks can be > >> read individually by 2 different read. > >> > >> The paper essence for 2 write ports and 2 read ports is: > >> There are 2 memory blocks each having 1 write port and 2 read ports. > >> > >> The 2 memory blocks provide 2 write ports to write independently. > >> > >> There is another memory block, called LVT (Live Value Table), with 2 > >> write ports and 2 read ports, each cell of which stores the port > >> number which holds the latest write data. > >> > >> Example: > >> > >> simultaneously: > >> Write through port 1 with address 3; --- no problem > >> > >> Write through port 0 with address 2; > >> > >> simultaneously: > >> 0 --> LVT(2); > >> 1 --> LVT(3); --- how can it write 2 cells of a memory at the same cycle? > >> > >> If above 2 simultaneously write operation are feasible, 2 read > >> operations can read from LVT first to get proper port number, and then > >> get the correct latest data read from the port number. > >> > >> Thank you. > >> > >> Weng > >> > > > > Hi Weng, > > > > It is quite a simple scheme, assume you have 2 write ports each writing > > into their own blockram. If port0 write to address 0x12 and port1 writes > > to address 0x15 then the LVT (single bit array in this case) will store > > array[12]=0 and array[15]=1. > > Then if a read port read from address 15 the LVT array will set the mux > > to 1 which connect the second blockram to the output. > > > > I use the XOR variant in my processor for a 8w8r block. > > > > Good luck, > > Hans > > www.ht-lab.com > > > > Although the kicker with this paper is in simultaneous reads. They > gloss pretty hard over the fact that (per the end of 5.3 and 5.4), for N > write ports and M read ports, you need N*M redundant BRAMs. For their > example of a 4-write, 8-read RAM they're using 32-fold the actual RAM > requirements. Can't even take advantage of BRAM packing, since they use > both ports of each RAM to keep one dedicated write port and one > dedicated read. 32x is a hell of a multiplier to be fighting against; > it'll chew up all the RAM in a cheap FPGA before you can bat an eye. > > -- > Rob Gaddi, Highland Technology -- www.highlandtechnology.com > Email address domain is currently out of order. See above to fix.
I needed a 4-port RAM to do 2 read-modify-writes per cycle. This quadrupled the blockRAM requirement. It was totally worth it for that design. It's not always worth it.
On Tuesday, January 15, 2019 at 7:58:15 AM UTC-5, Rick C. Hodgin wrote:
> On Tuesday, January 15, 2019 at 12:46:25 AM UTC-5, gnuarm.del...@gmail.com wrote: > > On Tuesday, January 15, 2019 at 12:14:04 AM UTC-5, Rick C. Hodgin wrote: > > > On Monday, January 14, 2019 at 7:01:55 PM UTC-5, gnuarm.del...@gmail.com wrote: > > > > On Monday, January 14, 2019 at 6:15:17 PM UTC-5, Rick C. Hodgin wrote: > > > > > On Monday, January 14, 2019 at 5:42:37 PM UTC-5, gnuarm.del...@gmail.com wrote: > > > > > > Our patent seeking friend fails to understand the very basic issue > > > > > > of how a multi-write port RAM can operate. > > > > > > > > > > Always there with a pure heart of kindness, one given to teaching, > > > > > apt to help compensate when someone is perhaps less than they should > > > > > be. Always accommodating, always uplifting, always at the ready to > > > > > improve another's life, eh Rick? > > > > > > > > I am happy to answer questions and provide advice to those who ask for it. Sometimes the person finds it useful other times not. I am not alone in offering the same sort of help to more than one person in this group. But it is often declined presumably because the person asking for help doesn't really want help as much as getting others to do their work for them. > > > > > > Whoosh! > > > > Are we trolling? That is so un-Christian of you! > > I don't troll. > > That was the sound of my point in the prior post flying right past you.
I can see that you would not understand you are trolling. You understand so little of what is written to you here. You never seem to understand how you interact with people here. You always feel people are lashing out at you. I've only tried to help you and in the end you decide that what anyone if offering to teach you is not what you need to learn and you freak out retreating into your religious shell-home. I find it interesting that this time you returned, not because you have some technical imperative that you want to discuss, but because you just want to throw dirt at someone. You seem to be regressing. I believe the term that best describes you is pious. The very nature of your present conversation is un-Christian. By definition you are trolling, trying to get a rise out of me. Can't you see any of that? If you can't see it, perhaps you would be better off not posting here until you have learned those two things? Then once you have learned what God is trying to teach you it will be of benefit for you to return. Rick C. +- Get 6 months of free supercharging +- Tesla referral code - https://ts.la/richard11209
On Tuesday, January 15, 2019 at 10:18:19 AM UTC-5, Weng Tianxiang wrote:
> On Tuesday, January 15, 2019 at 7:11:39 AM UTC-8, Weng Tianxiang wrote: > > Hi, > > > > Here is my perfect answer to my question in VHDL and it has one copy and is capable for doing N writes and N reads at the same time: > > > > signal R0, R1, ..., Rn_1 : std_logic_vector(BITS-1 downto 0); > > type NR_NW_TYPE : (0 to N-1) of unsigned(BITS-1 downto 0); > > alias NR_NW : NR_NW_TYPE := (R0, R1, ..., Rn_1); > > > > Now one can do N writes to any data and N reads from any data of NR_NW on the same cycle. > > > > A1 <= NR_NW(j); --> A1 <= Rj; > > > > NR_NW(j) <= B1; --> Rj <= B1; > > > > Weng > > There are no limits on the number of reading and writing: > > If 2 writes are for the same address one must arrange them in a same if-statement. > > Weng
I would like to see that code. BTW, what is the point of the alias in your above description? Why bother with the Rj notation at all? Rick C. ++ Get 6 months of free supercharging ++ Tesla referral code - https://ts.la/richard11209
On Monday, January 14, 2019 at 5:11:48 PM UTC-7, gnuarm.del...@gmail.com wrote:
> On Monday, January 14, 2019 at 6:38:35 PM UTC-5, Rob Gaddi wrote: > > On 1/14/19 1:22 PM, HT-Lab wrote: > > > On 14/01/2019 19:54, Weng Tianxiang wrote: > > >> Hi, > > >> > > >> I cannot understand the following paper: > > >> "Efficient Multi-Ported Memories for FPGAs" > > >> > > >> http://www.eecg.toronto.edu/~steffan/papers/laforest_fpga10.pdf > > >> > > >> FPGA has a structure with 1 write port and 2 read port memory block: 2 > > >> memory blocks sharing the same write port and each of 2 blocks can be > > >> read individually by 2 different read. > > >> > > >> The paper essence for 2 write ports and 2 read ports is: > > >> There are 2 memory blocks each having 1 write port and 2 read ports. > > >> > > >> The 2 memory blocks provide 2 write ports to write independently. > > >> > > >> There is another memory block, called LVT (Live Value Table), with 2 > > >> write ports and 2 read ports, each cell of which stores the port > > >> number which holds the latest write data. > > >> > > >> Example: > > >> > > >> simultaneously: > > >> Write through port 1 with address 3; --- no problem > > >> > > >> Write through port 0 with address 2; > > >> > > >> simultaneously: > > >> 0 --> LVT(2); > > >> 1 --> LVT(3); --- how can it write 2 cells of a memory at the same cycle? > > >> > > >> If above 2 simultaneously write operation are feasible, 2 read > > >> operations can read from LVT first to get proper port number, and then > > >> get the correct latest data read from the port number. > > >> > > >> Thank you. > > >> > > >> Weng > > >> > > > > > > Hi Weng, > > > > > > It is quite a simple scheme, assume you have 2 write ports each writing > > > into their own blockram. If port0 write to address 0x12 and port1 writes > > > to address 0x15 then the LVT (single bit array in this case) will store > > > array[12]=0 and array[15]=1. > > > Then if a read port read from address 15 the LVT array will set the mux > > > to 1 which connect the second blockram to the output. > > > > > > I use the XOR variant in my processor for a 8w8r block. > > > > > > Good luck, > > > Hans > > > www.ht-lab.com > > > > > > > Although the kicker with this paper is in simultaneous reads. They > > gloss pretty hard over the fact that (per the end of 5.3 and 5.4), for N > > write ports and M read ports, you need N*M redundant BRAMs. For their > > example of a 4-write, 8-read RAM they're using 32-fold the actual RAM > > requirements. Can't even take advantage of BRAM packing, since they use > > both ports of each RAM to keep one dedicated write port and one > > dedicated read. 32x is a hell of a multiplier to be fighting against; > > it'll chew up all the RAM in a cheap FPGA before you can bat an eye. > > I'm not sure what your point is. That is the nature of multiport memories. If you need it, you need it. They can be the performance limiting portion of a design and so they would be very welcome at nearly any cost. > > I seem to recall when Xilinx block rams had true quad port capability in that they could read and write from two ports all at the same time. There may have only been two address buses, I can't recall. But the two write ports could operate simultaneously. The only limitation was both ports could not write to the same address. > > Rick C. > > -- Get 6 months of free supercharging > -- Tesla referral code - https://ts.la/richard11209
You could consider the Xilinx BRAMs true quad port, if you set both ports to READ_FIRST, with the limitation that there are only 2 address buses and you have to read from the same address to which you are writing. Most of the time you want to read from some address other than the one to which you are writing. When I was trying to make a true quad port (4 addresses) I found a Xilinx app note (XAPP228) on making a BRAM-based quad port. I was excited I wouldn't have to design one from scratch. I opened the app note and saw it described how to double the clock and use timeslicing to make extra virtual ports. Thanks, Xilinx! Like I needed an app note for that. No problem; I'll just double my 350MHz clock to 700MHz.
On Tuesday, January 15, 2019 at 12:04:28 PM UTC-5, Rick C. Hodgin wrote:
> On Tuesday, January 15, 2019 at 11:29:49 AM UTC-5, gnuarm.del...@gmail.com wrote: > > On Tuesday, January 15, 2019 at 7:58:15 AM UTC-5, Rick C. Hodgin wrote: > > > That was the sound of my point in the prior post flying right past you. > > > > [snip] > > My point is ... be nice and respectful of people, even if you think > they are not what they should be in terms of knowledge or ability.
Yes, you might take your own advice. That is the thing about you Hodgin's. You sincerely believe you are holier than thou. Try looking at the world through other people's glasses and you will see that you yourself are the troll here. Just consider the purpose of your first post in this thread. Clearly it wasn't for the benefit of anyone else. Tell us what benefit you hoped to gain by it? If you could just lose the pious attitude you might be able to learn something here. Rick C. --- Get 6 months of free supercharging --- Tesla referral code - https://ts.la/richard11209
On Tuesday, January 15, 2019 at 1:47:54 PM UTC-5, Rick C. Hodgin wrote:
> On Tuesday, January 15, 2019 at 12:58:27 PM UTC-5, gnuarm.del...@gmail.com wrote: > > On Tuesday, January 15, 2019 at 12:04:28 PM UTC-5, Rick C. Hodgin wrote: > > > On Tuesday, January 15, 2019 at 11:29:49 AM UTC-5, gnuarm.del...@gmail.com wrote: > > > > On Tuesday, January 15, 2019 at 7:58:15 AM UTC-5, Rick C. Hodgin wrote: > > > > > That was the sound of my point in the prior post flying right past you. > > > > > > > > [snip] > > > > > > My point is ... be nice and respectful of people, even if you think > > > they are not what they should be in terms of knowledge or ability. > > > > Yes, you might take your own advice. That is the thing about you Hodgin's. You sincerely believe you are holier than thou. > > NO!!! I do not, sir. I put in effort to serve God rightly, and > I am proud of my efforts toward that end, but I am not holier- > than-thou. I am a sinner in need of forgiveness just like every > other person on this Earth. > > >Try looking at the world through other people's glasses and you will see that you yourself are the troll here. > > I recognize how I am seen. But this message does not go forth > for those who will perish. It goes forth for those who will be > saved. > > The light of the world, Jesus Christ, has come into the world to > give us the way out of our sin. > > That is what I teach. I teach the way YOU CAN HAVE > *******ETERNAL********LIFE*******!!! It's not for personal gain > for me or my family, or for a church I belong to. I'm teaching > how YOU can have your sin forgiven, and you can be in paradise > with God after you leave this world. Paradise, Rick. > > > Just consider the purpose of your first post in this thread. Clearly it wasn't for the benefit of anyone else. Tell us what benefit you hoped to gain by it? > > It was to try and grab hold of you by the ears, and rattle your > thinking into shape, so you'd realize your comments toward Weng > Tianxiang were inappropriate, and that you have a biting tongue > always causing pain under the guise of providing help. > > > If you could just lose the pious attitude you might be able to learn something here. > > If you could remove the blinders from your eyes, you'd see what > Jesus Christ can offer you. You only see through worldly eyes, > Rick, and you will not see anything else. > > There is more. And it is that more that is FAR MORE important than > what you see today. Please ... seek the truth in these words, and > don't just conclude that I'm something like holier-than-thou. I am > trying to lead you to the most desirable end for your life, be that > in 1 hour, or 80 years. > > Regardless of your assessment summary of me today, someday you will > know the truth, and that truth will own the day. I am not what you > think I am, and I am sincere in desiring to reach out to you and > the others here so they too can be saved. > > -- > Rick C. Hodgin
This is exactly what I am talking about. The simple fact that you judge me shows you feel you are a "better" person than I am. The fact that you accept that you are a sinner is not the issue. You believe you are better than the other sinners and you know the one true way. It is not about saving anyone. It is about your ego, that you are the person who will save others. Arrogance! I sincerely believe you will never understand this or much about electronics. In both cases the only problem is that you shut out the truth, the true word. Rick C. --+ Get 6 months of free supercharging --+ Tesla referral code - https://ts.la/richard11209
On Tuesday, January 15, 2019 at 2:43:23 PM UTC-5, Rick C. Hodgin wrote:
> On Tuesday, January 15, 2019 at 2:21:34 PM UTC-5, gnuarm.del...@gmail.com wrote: > > ... The simple fact that you judge me shows you feel you are a > > "better" person than I am. > > No, sir. We are called to teach people where they are, and what > it means. > > https://tinyurl.com/ybrnwljs
I didn't say "teach". I said "judge". You are clearly judging people when you refer to "those who will perish" and "those who will be saved". All your posts here are about putting yourself above others on this planet... as if we were not someone that God loves and who love God. You know nothing about us. You only know your own feelings and respond this way not out of love for anyone else, but because you find yourself lost and don't understand what anyone is saying to you. Rick C. -+- Get 6 months of free supercharging -+- Tesla referral code - https://ts.la/richard11209
> My point is ... be nice and respectful of people, even if you think > they are not what they should be in terms of knowledge or ability. > > -- > Rick C. Hodgin
Hi Rick C. Hodgin, 1. I am standing for your opinion: be nice and respectful of people! 2. And I appreciate your 3 excellent references very much. By your 3 references I think everyone who read this post really learned from you and fully understands the solution to my post. Thank you. Weng