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Virtex 4 ACE Compact Flash configuration problem

Started by Dan July 18, 2006
I also tried to edit the svf  file in order to add

//NEW CODE SEGMENT: Loading device with a 'bypass' instruction
SIR 14 TDI (3fff) SMASK (3fff) ;
RUNTEST 2434000 TCK ;

as per

http://www.xilinx.com/xlnx/xil_ans_display.jsp?iCountryID=1&iLanguageID=1&getPagePath=23146&BV_SessionID=@@@@1939425689.1153421274@@@@&BV_EngineID=cccjaddiggjkkmgcefeceihdffhdfjf.0

unfortunatelly no results, still can't configure the board.

EEngineer wrote:
> I have set up the JTAG chain as you said, all 3 devices, generated the > ACE file, and it doesn't work again, red 'err' led is on, green 'done' > led stays off: > > Device #0 was xcf32p > Device #1 xc95144lx > Device #2 xc4vsx35 > > I assigned the configuration bit file to the device#2, generated the > ACE file and downloaded it properly to the CF card. When I put the card > on the ML402 board, turned it on, red led 'err' is on. > > I tried simple configuration - simple design that should just turn the > led DS6 on.
You still don't have the right order you need to swap your device 1 and 2. The chain information is in the ML402 documentation. See page 31 http://www.xilinx.com/bvdocs/userguides/ug080.pdf Ed -- Xilinx Inc.
What should be the size of the ACE file, I always get 1674KB when
iMPACT generates it, versus all the 8 demos, they are all of the
exactly same size: 1686KB?

I have changed the order:

 Device #0 was xcf32p
 Device #1 xc4vsx35
 Device #2 xc95144lx

Assigned the configuration bit file again to the xc4vsx35 device,
generated ACE, put it on CF, again could not configure the board.

Thanks,
Dan

Ed McGettigan wrote:
> EEngineer wrote: > > I have set up the JTAG chain as you said, all 3 devices, generated the > > ACE file, and it doesn't work again, red 'err' led is on, green 'done' > > led stays off: > > > > Device #0 was xcf32p > > Device #1 xc95144lx > > Device #2 xc4vsx35 > > > > I assigned the configuration bit file to the device#2, generated the > > ACE file and downloaded it properly to the CF card. When I put the card > > on the ML402 board, turned it on, red led 'err' is on. > > > > I tried simple configuration - simple design that should just turn the > > led DS6 on. > > > You still don't have the right order you need to swap your device 1 and 2. > > The chain information is in the ML402 documentation. See page 31 > http://www.xilinx.com/bvdocs/userguides/ug080.pdf > > Ed > -- > Xilinx Inc.
EEngineer wrote:
> I have changed the order: > > Device #0 was xcf32p > Device #1 xc4vsx35 > Device #2 xc95144lx > > Assigned the configuration bit file again to the xc4vsx35 device, > generated ACE, put it on CF, again could not configure the board. >
I just went ahead and generated a new ML402 ACE file using 8.1i and copy the files to the CF card with no issue or doing anything outside of the flow (such as SVF edits that you have been mentioning). Try the following. 1) Start over with a new iMPACT System ACE project 2) Call the "Collection" name "my_ml402" 3) Only create one revision (rev0) 4) Set up the device chain as above XCF32P -> XC4VSX35 -> XC95144XL 5) Assign your 4VSX35 BIT file to the XC4VSX35 device 6) Generate the System ACE file with no other edits 7) Remove all of the files from your CF card 8) Copy just the single ACE that you just generated to the CF card 9) Insert the CF card in the ML402 10) Verify that SW12 is set to the SYSACE position If this works then you have a good ACE file. If it doesn't work go back and double check that you really have the correct chain defined and that your bitstream is targeting a SX35 device and that you generate the BIT file with the startupclk = jtagclk setting. If you can't get a CF card with just an ACE file to work then you probably have a mal-formated CF Card see this answer record to reformat the card: http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14456 Now that the ACE file is known to be good. You either have an address switch setting issue or you copied the files incorrect to the CF card. 1) Remove all of the files from the CF card again 2) Copy the xilinx.sys and the "my_ml402" collection directory that you generated earlier to the blank CF card. 3) Verify that the CFG ADDR switches 1, 2 & 3 are in the OFF state for an address of 000 4) Insert the CF Card in the ML402 5) The ACE file should now load Ed McGettigan -- Xilinx Inc.
I started from the beginning and followed all the steps you suggested.
The result was the same - the red led was on and the green 'done' was
off.

Then I downloaded the mkdosfs and formatted the CF card as per answer
record you recommended. Same result - 'Err' was on again. I have
noticed that CF has decreased from 32MB to 24MB after formatting. I
tested if the old demo ACE files worked - copied them back from the HDD
to the card, they worked fine again, just not the new one created with
iMPACT.
What is the ACE file size that you created? All the demos are 1686KB
and the new ACE created with iMPACT is 1674KB.

I tried with just single ACE file on the CF, any of the demo files
worked that way too, but not the new one. Also didn't work with the
file structure generated by iMPACT:

E:\my_ml402\rev0\rev0.ace
E:\xilinx.sys

I always had CFG ADDR switches set to 000111, and SW12 to SYS ACE
position.

Thanks for help.
Dan

Ed McGettigan wrote:
> EEngineer wrote: > > I have changed the order: > > > > Device #0 was xcf32p > > Device #1 xc4vsx35 > > Device #2 xc95144lx > > > > Assigned the configuration bit file again to the xc4vsx35 device, > > generated ACE, put it on CF, again could not configure the board. > > > > I just went ahead and generated a new
ML402 ACE file using 8.1i and
> copy the files to the CF card with no issue or doing anything outside > of the flow (such as SVF edits that you have been mentioning). > > Try the following. > > 1) Start over with a new iMPACT System ACE project > 2) Call the "Collection" name "my_ml402" > 3) Only create one revision (rev0) > 4) Set up the device chain as above XCF32P -> XC4VSX35 -> XC95144XL > 5) Assign your 4VSX35 BIT file to the XC4VSX35 device > 6) Generate the System ACE file with no other edits > 7) Remove all of the files from your CF card > 8) Copy just the single ACE that you just generated to the CF card > 9) Insert the CF card in the ML402 > 10) Verify that SW12 is set to the SYSACE position > > If this works then you have a good ACE file. If it doesn't work go > back and double check that you really have the correct chain defined > and that your bitstream is targeting a SX35 device and that you generate > the BIT file with the startupclk = jtagclk setting. > > If you can't get a CF card with just an ACE file to work then you > probably have a mal-formated CF Card see this answer record to reformat > the card: http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14456 > > Now that the ACE file is known to be good. You either have an address > switch setting issue or you copied the files incorrect to the CF card. > > 1) Remove all of the files from the CF card again > 2) Copy the xilinx.sys and the "my_ml402" collection directory that you > generated earlier to the blank CF card. > 3) Verify that the CFG ADDR switches 1, 2 & 3 are in the OFF state for > an address of 000 > 4) Insert the CF Card in the ML402 > 5) The ACE file should now load > > > Ed McGettigan > -- > Xilinx Inc.
EEngineer wrote:
> What is the ACE file size that you created? All the demos are 1686KB > and the new ACE created with iMPACT is 1674KB.
The file that I generated was 1686KB using the 8.1.03i (Service Pack 3) software. You can find out which version you are using the "Help -> About" menu. Ed
I am using

Release Version: 8.1i
Application Version: I.24

I always get 1674KB ACE file, maybe that points to some problem?

Ed McGettigan wrote:
> EEngineer wrote: > > What is the ACE file size that you created? All the demos are 1686KB > > and the new ACE created with iMPACT is 1674KB. > > The file that I generated was 1686KB using the 8.1.03i (Service Pack 3) > software. You can find out which version you are using the "Help -> About" > menu. > > Ed
 I use:

Service Pack 1


Ed McGettigan wrote:
> EEngineer wrote: > > What is the ACE file size that you created? All the demos are 1686KB > > and the new ACE created with iMPACT is 1674KB. > > The file that I generated was 1686KB using the 8.1.03i (Service Pack 3) > software. You can find out which version you are using the "Help -> About" > menu. > > Ed
Summary of Bitgen Options:
+----------------------+----------------------+
| Option Name          | Current Setting      |
+----------------------+----------------------+
| Compress             | (Not Specified)*     |
+----------------------+----------------------+
| Readback             | (Not Specified)*     |
+----------------------+----------------------+
| CRC                  | Enable**             |
+----------------------+----------------------+
| DebugBitstream       | No**                 |
+----------------------+----------------------+
| ConfigRate           | 4**                  |
+----------------------+----------------------+
| StartupClk           | JtagClk              |
+----------------------+----------------------+
| CclkPin              | Pullup**             |
+----------------------+----------------------+
| DonePin              | Pullup**             |
+----------------------+----------------------+
| HswapenPin           | Pullup*              |
+----------------------+----------------------+
| M0Pin                | Pullup**             |
+----------------------+----------------------+
| M1Pin                | Pullup**             |
+----------------------+----------------------+
| M2Pin                | Pullup**             |
+----------------------+----------------------+
| PowerdownPin         | Pullup*              |
+----------------------+----------------------+
| ProgPin              | Pullup**             |
+----------------------+----------------------+
| InitPin              | Pullup**             |
+----------------------+----------------------+
| CsPin                | Pullup**             |
+----------------------+----------------------+
| DinPin               | Pullup**             |
+----------------------+----------------------+
| BusyPin              | Pullup**             |
+----------------------+----------------------+
| RdWrPin              | Pullup**             |
+----------------------+----------------------+
| TckPin               | Pullup**             |
+----------------------+----------------------+
| TdiPin               | Pullup**             |
+----------------------+----------------------+
| TdoPin               | Pullup**             |
+----------------------+----------------------+
| TmsPin               | Pullup**             |
+----------------------+----------------------+
| UnusedPin            | Pulldown**           |
+----------------------+----------------------+
| GWE_cycle            | 6**                  |
+----------------------+----------------------+
| GTS_cycle            | 5**                  |
+----------------------+----------------------+
| LCK_cycle            | NoWait**             |
+----------------------+----------------------+
| Match_cycle          | Auto*                |
+----------------------+----------------------+
| DONE_cycle           | 4**                  |
+----------------------+----------------------+
| Persist              | No*                  |
+----------------------+----------------------+
| DriveDone            | No**                 |
+----------------------+----------------------+
| DonePipe             | No**                 |
+----------------------+----------------------+
| Security             | None**               |
+----------------------+----------------------+
| UserID               | 0xFFFFFFFF**         |
+----------------------+----------------------+
| ActivateGclk         | No*                  |
+----------------------+----------------------+
| ActiveReconfig       | No*                  |
+----------------------+----------------------+
| PartialMask0         | (Not Specified)*     |
+----------------------+----------------------+
| PartialMask1         | (Not Specified)*     |
+----------------------+----------------------+
| PartialMask2         | (Not Specified)*     |
+----------------------+----------------------+
| PartialGclk          | (Not Specified)*     |
+----------------------+----------------------+
| PartialLeft          | (Not Specified)*     |
+----------------------+----------------------+
| PartialRight         | (Not Specified)*     |
+----------------------+----------------------+
| Encrypt              | No**                 |
+----------------------+----------------------+
| Key0                 | pick*                |
+----------------------+----------------------+
| KeyFile              | (Not Specified)*     |
+----------------------+----------------------+
| StartCBC             | pick*                |
+----------------------+----------------------+
| DCIUpdateMode        | AsRequired**         |
+----------------------+----------------------+
| ICAP_Select          | Auto*                |
+----------------------+----------------------+
| IEEE1532             | No*                  |
+----------------------+----------------------+
| Binary               | Yes                  |
+----------------------+----------------------+
 *  Default setting.
 ** The specified setting matches the default setting.

Running DRC.
DRC detected 0 errors and 0 warnings.
Creating bit map...
Saving bit stream in "test.bit".
Saving bit stream in "test.bin".
Bitstream generation is complete.