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Problems with Xilinx Parallel III Cable

Started by Unknown March 28, 2007
<EvalXX@gmail.com> wrote in message 
news:1175195472.611147.280310@n59g2000hsh.googlegroups.com...
> On Mar 28, 6:55 pm, "John_H" <newsgr...@johnhandwork.com> wrote: >> <jid...@hotmail.com> wrote in message >> >> news:1175098335.158323.203250@n59g2000hsh.googlegroups.com... >> >> The newer Xilinx programming cables (Parallel Cable IV, Platform Cable >> USB) >> use comparators rather than simple buffers to establish proper voltage > > > Where can I get these kind of comparators? What about multiple > voltages? Any sample circuits I can use as a reference? > > Thanks > - E.
Almost any kind of comparators? Take a look at the Platform Cable USB Product Specification http://direct.xilinx.com/bvdocs/publications/ds300.pdf pages 11-12 for an idea what Xilinx does to get the voltage compliance and well-defined threshold values. If you substitute the 5V LPT buffers for the CPLD, you can pretty much cut & paste your way from a Parallel-III to a Parallel-IV style cable (though you'd still refer to it in SW as a Paralell-III). I should reiterate that having your VCC act as both a VREF and source for a DC-DC converter is a solid way to design for the 5V LPT interface and the lower-voltage JTAG interface.