Stratix IV Announced

On 20 May, 03:03, jhal...@TheWorld.com (Joseph H Allen) wrote:
> They've also released Hardcopy-IV, including serdes and PCI-e. =A0Why both=
er
> with ASICs...

Cost - power - analog.

Jon

On 21 Mai, 08:07, Peter Alfke <al...@sbcglobal.net> wrote:
> On May 20, 10:17 pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
>
>
> Let's not turn this into a marketing slugfest.
> It does not take a genius to figure out why Altera was forced to
> embark on such a risky gamble...
> "We live in interesting times"
> Peter Alfke

waiting for Spartan-4 is boring.. not interesting :(

Antti
PS but times are interesting yes

Antti wrote:
> On 21 Mai, 08:07, Peter Alfke <al...@sbcglobal.net> wrote:
> 
>>On May 20, 10:17 pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
>>
>>
>>Let's not turn this into a marketing slugfest.
>>It does not take a genius to figure out why Altera was forced to
>>embark on such a risky gamble...
>>"We live in interesting times"
>>Peter Alfke
> 
> 
> waiting for Spartan-4 is boring.. not interesting :(

I'm left wondering whatever happened to Altera's MAX III
devices  ? ;)

Seems to be 'missing in action' ?

-jg

On 21 Mai, 21:40, Jim Granville <no.s...@designtools.maps.co.nz>
wrote:
> Antti wrote:
> > On 21 Mai, 08:07, Peter Alfke <al...@sbcglobal.net> wrote:
>
> >>On May 20, 10:17 pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
>
> >>Let's not turn this into a marketing slugfest.
> >>It does not take a genius to figure out why Altera was forced to
> >>embark on such a risky gamble...
> >>"We live in interesting times"
> >>Peter Alfke
>
> > waiting for Spartan-4 is boring.. not interesting :(
>
> I'm left wondering whatever happened to Altera's MAX III
> devices  ? ;)
>
> Seems to be 'missing in action' ?
>
> -jg

I bet Lattice XP2 have killed MAX3 already
the pricing for XP2 looks nice too :)

Antti

On May 20, 11:26 am, austin <aus...@xilinx.com> wrote:
> Joseph,
>
> Why bother?  Only because all of the 'other' solutions actually exist,
> where H4 is a hyper-active sales pitch for an untested capability that
> hasn't even been taped out yet...
>
> Imagine all those Altera customers who designed in the Stratix III GX:
> all dressed up, and nowhere to go.
>
> Using FPGAs is all about reducing risk.  Converting the FPGA to an ASIC
> (structured or otherwise) is all about reducing costs.
>
> No risk: Virtex 5, today, available
>
> Lower Cost: Virtex 5 EasyPath(tm) devices, guaranteed to work, because
> they are IDENTICAL to the FPGA
>
> Austin

ALTERA
XILIXNX
QUARTUS - incremental compile                         ISE - NO
incremental compile
                -
Windows                                                - Linux (for
large chip, 16G of memory)
                - Fast compile times                                 -
Very long times (sometimes no fit unknown)
                - SOPC - ok to use                                   -
EDK - very hard to use
                - NIOS - very easy
- Microblaze - not easy


Engineers get reviewed on progress not one A vs. X
I still don't understand how many questions are posted about X here.
I use can use both. I like The A Company model.  I don't agree that X
marketing people have to do damage control here.

On May 24, 3:37 pm, turkey_b...@yahoo.com wrote:
> On May 20, 11:26 am, austin <aus...@xilinx.com> wrote:
>
>
>
> > Joseph,
>
> > Why bother?  Only because all of the 'other' solutions actually exist,
> > where H4 is a hyper-active sales pitch for an untested capability that
> > hasn't even been taped out yet...
>
> > Imagine all those Altera customers who designed in the Stratix III GX:
> > all dressed up, and nowhere to go.
>
> > Using FPGAs is all about reducing risk.  Converting the FPGA to an ASIC
> > (structured or otherwise) is all about reducing costs.
>
> > No risk: Virtex 5, today, available
>
> > Lower Cost: Virtex 5 EasyPath(tm) devices, guaranteed to work, because
> > they are IDENTICAL to the FPGA
>
> > Austin
>
> ALTERA
> XILIXNX
> QUARTUS - incremental compile                         ISE - NO
> incremental compile
>                 -
> Windows                                                - Linux (for
> large chip, 16G of memory)
>                 - Fast compile times                                 -
> Very long times (sometimes no fit unknown)
>                 - SOPC - ok to use                                   -
> EDK - very hard to use
>                 - NIOS - very easy
> - Microblaze - not easy
>
> Engineers get reviewed on progress not one A vs. X
> I still don't understand how many questions are posted about X here.
> I use can use both. I like The A Company model.  I don't agree that X
> marketing people have to do damage control here.

Sorry for the garble! the upload messed it up.


XILIXNX
 - ISE - NO incremental compile (2 method one from XILINX &
Synplicity)
    (UCF's constraints not supported in Synplicity for incremental
compile)
 - Linux for large chip, 16GB of memory required, Windows only
supports 4GB
 - Very long times (sometimes no fit unknown, FAE's puzzled)
 - EDK - very hard to use
 - Microblaze - not easy
 - EasyPath - chips that failed full MFG tests. Oh yea I'll put a
design in that has reliability requirement.

ALTERA
 - QUARTUS - incremental design (it works)
 - works on all families in WINDOWS
 - Compile times are ok!
 - SOPC, can use
 - NIOS use a lot (software engineers can plan reliable specification)
 - HARDCOPY - great for large chips & reduce cost where high chip
count is in product.

I could go!

 Engineer's get reviewed on progress not one A vs. X
  I still don't understand how many questions are posted here about X
here.
   Why not make X tools obvious and watch the questions go down in
this newsgroup!
  I use can use both. I like the Lattice CPLD's with PLL's & LVDS. I
like the ACTEL also!
  I like The A Company model.
  I put the time into the design not making the design work through
the tool.
  I watch the X FAE's struggle to resolve design issues in their
tool.  I could go on here about MGT & aurora using a VIRTEX2PRO and it
worked on older versions of ISE and fails on a new version. Of course
I had to use a newer version of ISE and Synplicity. (One of the tools
was ripping something out)


I don't agree that X marketing people have to do damage control here.
Why put the effort into making ISE a repeatable tool (for the same
design on re-compile)!

I normally don't post! But I read this newsgroup to head off bugs. I
lost control!

On May 21, 2:07 am, Peter Alfke <al...@sbcglobal.net> wrote:
> On May 20, 10:17 pm, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
>
>
>
>
>
>
>
> > austin wrote:
> > > Joseph,
>
> > > Imagine all those Altera customers who designed in the Stratix III GX:
> > > all dressed up, and nowhere to go.
>
> > Maybe Altera also shares roadmaps like you do to bigger customers, and
> > those designers maybe do not exist... Imagine all those V4FX designers
> > who wanted working fast tranceivers.
>
> > I would say all vendors offer surprises to customers who are using
> > leading edge devices.
>
> > > Lower Cost: Virtex 5 EasyPath(tm) devices, guaranteed to work, because
> > > they are IDENTICAL to the FPGA
>
> > My opinion is that EasyPath is the worst of the two worlds. It has
> > limitations in flexibility, and the possibilities with price are
> > not that great because it is the same silicon. Better to have either
> > the full flexibility which costs or then the lowest possible cost
> > with no flexibility.
>
> > --Kim
>
> Let's not turn this into a marketing slugfest.
> It does not take a genius to figure out why Altera was forced to
> embark on such a risky gamble...
> "We live in interesting times"
> Peter Alfke

I would say characterizing Altera's step to be "a risky gamble" *IS*
making it a marketing slugfest.

I remember when Xilinx was touting that they were one of the first
adopters the then bleeding edge process geometery on the Spartan 3.
They also indicated that the Spartan line would be the new ground
breaker because of the need for lowest prices.

So when Xilinx uses the most current technology it is "a bold step"
while Altera makes "risky gambles"?

I seem to recall that Spartan 3 had many, many issues related to the
use of the advanced technology and I don't see where the Spartan line
is the ground breaker for today's current technology.  I guess that
didn't pan out in the end, huh?

Rick