Difference among Virtex Families, FPGA Books

On Jan 7, 2:21=A0pm, "rk" <ajrajku...@gmail.com> wrote:
> >rk <ajrajku...@gmail.com> wrote:
> >> Hi Folks
>
> >> =A0 =A0I have recently become very interested in FPGA and DSP. Could
> somebody
> >> suggest to me a newbee started book and also a related experimental
> board.
>
> >> =A0 =A0I would also like to know the differences between the different
> Virtex
> >> families like Virtex 2, 4, 5 etc.
>
> >Where did you start? Where did you struggle?
>
> >Trywww.xilinx.com...
>
> >--
> >Uwe Bonnes =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0b...@elektron.ikp.physik.tu-da=
rmstadt.de
>
> >Institut fuer Kernphysik =A0Schlossgartenstrasse 9 =A064289 Darmstadt
> >--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
>
> Hi
> =A0 =A0Yes, I have been to that website, and I see a lot of datasheets
> for Virtex-2, 4, 5, 6 etc, but I do not able to get a comprehensive
> evolution of the family and the enhancements in sucessive 2, 4, 5 etc
> families.
> =A0 =A0Also, I am looking for a good book along with a board that I can
> but and develop some hands on experience.
> =A0 =A0Visitingwww.xilinx.comresults in an information overload for
> a beginner.
>
> Regards
> RK

RK, I think you left me a phone message which I tried to return, but
very late.  Yes, learning FPGA design can be a daunting task.  It is a
combination of a number of areas, including logic design, system
design, software and signal integrity among others depending on your
application.  Conceptually it is simple, you just decide what your
design should do and you describe it in an HDL.  Or is you are stuck
in the past you can use schematics, but very, very few do these days.
Once your design is described, it is compiled by the tools along with
a preference file indicating what signals connect to what pins as well
as any timing requirements (although timing specs can get a bit
complicated).  The resulting bit file is loaded into your part and you
can test.  Of course, it is much smarter to simulate your design
before you try testing.  It is much easier to see the innerds of the
chip in a simulator than it is in the real chip.

That is the simple view from 10,000 feet (3,000 meters).  When you
actually try to learn to do all this, there are so many details that
it is much harder.  Learning the details is the hard part of FPGA
design.  It is much easier if you learn it a little at a time,
focusing on the immediate parts and ignoring the more complicated
parts until later.  For example, if you try some designs that are
clocked at 10 MHz or lower, it is likely that it will work without
timing constraints which can help a newbie.

My personal preference is to design hardware, rather than write
software.  This is a philosophical difference.  I think in terms of
the hardware I want and describe that using the HDL.  Others prefer to
just think in terms of describing the functioning of the design and
let the tools figure out what hardware is needed.  This can be easier
for a novice, but can result in some pretty inefficient
implementations.  Still, it isn't hard to learn how to write your code
to be more efficient, so in some ways I think I am becoming a
dinosaur.

I would suggest that you buy a base level Spartan kit for under $100.
The free webpack tools will give you all you need to get started.
Rather than mess with a text book which will not be specific to your
tools or hardware, use the tutorials with the tools and learn the
basics that way.  Then come here when you have trouble.  There are
tones of folks here who will enjoy helping you.

Rick