FPGAs for Dummies - Altera Special Edition
Field programmable gate arrays (FPGAs) are integrated circuits that enable designers to program customized digital logic in the field. FPGAs have been around since the 1980s and were originally conceived to give all design teams the ability to create custom logic. In the early days, using an FPGA in your design meant you had to do a lot of programming just to get your FPGA to perform simple functions, so most designers avoided them. If you haven’t looked into FPGAs since your university studies way back when, you’ll want to take another look at them. The FPGA has evolved from a useful but humble interface device into a system-level integrated circuit (IC) with its own microprocessors, memory blocks, and interfaces. It’s the next big thing. Now would be a great time to get an inexpensive development kit, download free tools, and begin to explore this world for yourself. And this book will help you understand the practical uses of FPGAs.
Memory Reduced and Fast DDS Using FPGA
Direct digital synthesis is a method of creating arbitrary waveforms of desired frequency. A general DDS system comprises analog and digital part. Phase accumulator and LUT make digital part and DAC makes analog part. This paper presents 12 bit memory reduced FPGA based architecture of DDS. Phase truncation and quadrature symmetry of sine wave are used to achieve higher ROM compression. Dither is also used to achieve error free output. This design has been implemented on SPARTAN-3E FPGA with maximum clock frequency of 50 MHz. We have used LTC2624 quad DAC with 12 bit resolution which introduces very less amount of harmonics hence LPF is not needed. This design uses only 128 memory locations. Hence it is suitable for applications where system speed, memory and size of the system are main concern. Its wide and flexible range of frequency make it useful in RF transmission, Biomedical function generators and Modulation.
Memory Reduced and Fast DDS Using FPGA
Direct digital synthesis is a method of creating arbitrary waveforms of desired frequency. A general DDS system comprises analog and digital part. Phase accumulator and LUT make digital part and DAC makes analog part. This paper presents 12 bit memory reduced FPGA based architecture of DDS. Phase truncation and quadrature symmetry of sine wave are used to achieve higher ROM compression. Dither is also used to achieve error free output. This design has been implemented on SPARTAN-3E FPGA with maximum clock frequency of 50 MHz. We have used LTC2624 quad DAC with 12 bit resolution which introduces very less amount of harmonics hence LPF is not needed. This design uses only 128 memory locations. Hence it is suitable for applications where system speed, memory and size of the system are main concern. Its wide and flexible range of frequency make it useful in RF transmission, Biomedical function generators and Modulation.
