Why I would choose an FPGA development board?

Pablo Trujillo

Some years ago, when I went to the University, I bought some development boards based on different microcontrollers, and I remember that, although development boards were not expensive, I had to add to the price of the board, the shipping costs...


Computing Fixed-Point Square Roots and Their Reciprocals Using Goldschmidt Algorithm

Michael Morris

IntroductionA well known algorithm for computing square roots by iteration is provided by the Newton-Raphson Algorithm. The algorithm determines the square root using iteration until the root has been determined to some user-defined level of...


MyHDL synthesis: from browser to FPGA in five seconds

Martin Strubel

When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a...


Use DPLL to Lock Digital Oscillator to 1PPS Signal

Michael Morris

Introduction There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency...


Summer of gateware is coming (again)

Christopher Felton

How time flies!  I swear my last post was a summary of the 2015 summer of gateware.  This year (2016) MyHDL is participating in the Google summer of code again, for the second year, continuing as a sub-org of the Python...


Makefiles for Xilinx Tools

Victor Yurkovsky

Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools.  You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together.  I am...


Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines

Michael Morris

Introduction This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state...


Fit Sixteen (or more) Asynchronous Serial Receivers into the Area of a Standard UART Receiver

Michael Morris

Introduction This article will describe a technique, available in many current FPGA architectures, to fit a large amount of logic into a small area. About ten years ago now (Feb/Mar 2005), I helped develop a multi-line Caller ID product....


I don’t often convert VHDL to Verilog but when I do ...

Christopher Felton

VHDL to Verilog I don’t often convert VHDL to Verilog but when I do it is not the most exciting task in the world (that is an understatement).  For the most part I am HDL agnostic.  Well that is not true, I have a strong...


MyHDL @EDAPlayground

Christopher Felton

  Trying out MyHDL became a little easier recently.  MyHDL is now avaialbe @EDAPlayground.  One can experiment with Python/MyHDL verification of HDL modules and implementing complex digital cirucits in MyHDL. The...