An absolute position encoder VHDL core

Fabien Le Mentec ● November 11, 2015

Let's consider motorized systems controlled by electronics. A closed loop architecture looks like this:

The following components are involved:

• the motor itself (DC, stepper ...),
• the controller, in charge of computing position according to the whole system state,
• the driver board in charge of generating signals and power for the motor,
• the position encoder, the subject of this post.

Most of the time, there is a difference between the position the system...

Introducing the VPCIe framework

Fabien Le Mentec ● August 31, 2013●3 comments

My daily work involves platforms featuring an embedded CPU communcating with a FPGA device over a PCI Express link (PCIe for short). The main purpose of this link is for the CPU to convey configuration, control, and status commands to hardware slaves implemented in the FPGA. For data intensive applications (2D XRay detector readout backend), this link can also be used as a DMA channel to transfer data from the FPGA to the CPU memory. Finally, a slave can interrupt the CPU using...

An absolute position encoder VHDL core

Fabien Le Mentec ● November 11, 2015

Let's consider motorized systems controlled by electronics. A closed loop architecture looks like this:

The following components are involved:

• the motor itself (DC, stepper ...),
• the controller, in charge of computing position according to the whole system state,
• the driver board in charge of generating signals and power for the motor,
• the position encoder, the subject of this post.

Most of the time, there is a difference between the position the system...

Introducing the VPCIe framework

Fabien Le Mentec ● August 31, 2013●3 comments

My daily work involves platforms featuring an embedded CPU communcating with a FPGA device over a PCI Express link (PCIe for short). The main purpose of this link is for the CPU to convey configuration, control, and status commands to hardware slaves implemented in the FPGA. For data intensive applications (2D XRay detector readout backend), this link can also be used as a DMA channel to transfer data from the FPGA to the CPU memory. Finally, a slave can interrupt the CPU using...

Introducing the VPCIe framework

Fabien Le Mentec ● August 31, 2013●3 comments

My daily work involves platforms featuring an embedded CPU communcating with a FPGA device over a PCI Express link (PCIe for short). The main purpose of this link is for the CPU to convey configuration, control, and status commands to hardware slaves implemented in the FPGA. For data intensive applications (2D XRay detector readout backend), this link can also be used as a DMA channel to transfer data from the FPGA to the CPU memory. Finally, a slave can interrupt the CPU using...

An absolute position encoder VHDL core

Fabien Le Mentec ● November 11, 2015

Let's consider motorized systems controlled by electronics. A closed loop architecture looks like this:

The following components are involved:

• the motor itself (DC, stepper ...),
• the controller, in charge of computing position according to the whole system state,
• the driver board in charge of generating signals and power for the motor,
• the position encoder, the subject of this post.

Most of the time, there is a difference between the position the system...