Are you kidding me?
Christopher Felton pushes back on the idea that C/C++/SystemC are the natural path to higher-abstraction FPGA design. He argues hardware designers often do not use C-family languages for modeling and simulation, so choosing C as the HLS lingua franca may be more about tool momentum than suitability. The post urges reconsidering languages with higher abstraction and lower cost of entry for system modeling and HLS.
A Bit Bucket had Holes
Christopher Felton looks back at TierLogic's multi-layer FPGA idea and its recent shutdown, contrasting it with Tabula's virtual 3D approach. He asks whether physical-layer stacking could have delivered the ultra-high logic density some designs need, especially at modest clock rates and small footprints. The post highlights how funding, market fit, and patent outcomes often decide whether neat FPGA tech becomes a product.
Are you kidding me?
Christopher Felton pushes back on the idea that C/C++/SystemC are the natural path to higher-abstraction FPGA design. He argues hardware designers often do not use C-family languages for modeling and simulation, so choosing C as the HLS lingua franca may be more about tool momentum than suitability. The post urges reconsidering languages with higher abstraction and lower cost of entry for system modeling and HLS.
A Bit Bucket had Holes
Christopher Felton looks back at TierLogic's multi-layer FPGA idea and its recent shutdown, contrasting it with Tabula's virtual 3D approach. He asks whether physical-layer stacking could have delivered the ultra-high logic density some designs need, especially at modest clock rates and small footprints. The post highlights how funding, market fit, and patent outcomes often decide whether neat FPGA tech becomes a product.
Are you kidding me?
Christopher Felton pushes back on the idea that C/C++/SystemC are the natural path to higher-abstraction FPGA design. He argues hardware designers often do not use C-family languages for modeling and simulation, so choosing C as the HLS lingua franca may be more about tool momentum than suitability. The post urges reconsidering languages with higher abstraction and lower cost of entry for system modeling and HLS.
A Bit Bucket had Holes
Christopher Felton looks back at TierLogic's multi-layer FPGA idea and its recent shutdown, contrasting it with Tabula's virtual 3D approach. He asks whether physical-layer stacking could have delivered the ultra-high logic density some designs need, especially at modest clock rates and small footprints. The post highlights how funding, market fit, and patent outcomes often decide whether neat FPGA tech becomes a product.
