Victor Yurkovsky (@stack)

Victor Yurkovsky is an independent consultant. email

Tools of the Trade: reading PDFs (and keeping bookmarks)

Victor Yurkovsky July 7, 20155 comments

In this article I will take a look at the wonderful MuPDF viewer and present a small modification that saves bookmarks alongside the pdf files, making it infinitely more useful.

Some days I sit down to work and wonder how anything ever gets done. A simple example.  When I work on an FPGA design, I wind up with 3 or 4 screens full of documentation, generally in PDF format.  There are the Xilinx manuals, the various tool manuals, language reference manuals, you name it.  While...

Inside the Spartan-6: Using LUTs to optimize circuits

Victor Yurkovsky June 24, 20153 comments

While building a small CPU on a Spartan-6 chip I came across the same old problem: my Verilog was mapping to a lot of slices . Way more then seems reasonable. So let's dig in and see what's really going on.  

The J1 CPU (see Messing Around with a J1) is an amazingly streamlined design expressed in just over 100 lines of Verilog, and is reasonably compact at 150 Spartan-6 slices (half of that with the modifications described in the article).  But the Picoblaze is...

Homebrew CPUs: Color Languages

Victor Yurkovsky June 17, 2015
Color Languages

Here on bizarro we program using -- get this – text!  Our other senses - hearing, touch, smell, are not used at all. Even our visual perception is greatly underutilized - we just use two-dimensional text on a flat display a foot in front of our eyes.

Color is just beginning to be used, although in a lame syntax coloring way only. Granted, it makes it easier to detect stupid syntax errors such as misspelled keywords. Sadly, color carries zero semantic or...

Homebrew CPUs: Messing around with a J1

Victor Yurkovsky May 29, 2015

In this article I will examine James Bowman's excellent J1 CPU; I will then proceed to mess around with various parts of it, making it smaller, more appropriate to my particular application, and possibly faster.  I hope this will show you how easy it is to fiddle around with homemade CPUs and encourage you to make something weird and wonderful.


My hat is off to James Bowman.  J1 is pretty cool.  It is a stack machine; it executes instructions in one cycle, it is...

Makefiles for Xilinx Tools

Victor Yurkovsky May 12, 20155 comments

Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools.  You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together.  I am not a huge fan of makefiles either (I believe a language should be expressive enough to automate the build process), but the alternatives are dismal. 

Command-line driven workflow is easier on the hands and faster.  The example...

BGA and QFP at Home 1 - A Practical Guide.

Victor Yurkovsky October 13, 20134 comments

It is almost universally accepted by the hobbyists that you can't work with high-density packages at home.  That is entirely incorrect.  I've been assembling and reflowing BGA circuit boards at home for a few years now.  BGAs and 0.5mm-pitch QFPs are well within the realm of a determined amateur. 

This series of articles presents practical information on designing and assembling boards with high-density packages at home.  While the focus is on FPGA packages, most of...

Windows XP and Win32 - the Platform of the Future!

Victor Yurkovsky October 6, 20132 comments

Over the past decade I often wondered why anyone uses Windows.  It's just so... proprietary.  And pedestrian.  As I grew up my OS of choice went nothing to CPM to DOS (on Apple ][), GEM on Atari ST,  MS-DOS, DOS extenders, Mac OS, Windows NT, Windows XP, Linux...  Now, I again find myself a fan of Windows XP, the platform of the future.  (I am still a fan of bare metal, of course).Maybe I am not totally serious, but I, a self-proclaimed freedom lover and...

PC and SP for a small CPU

Victor Yurkovsky July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...

PicoBlaze - Program RAM Access for an Interactive Monitor

Victor Yurkovsky June 14, 20132 comments

I have a confession to make: I love PicoBlaze!  There are many reasons to love it.  It is a tiny CPU (96 Spartan3 slices or 26 Spartan6 slices plus a BRAM).  It is simple.  It is bug-free.  It's pretty fast.  It can reduce the size and the complexity of your design - instead of debugging a big state machine, just throw one (or more) of these in.  Add a serial output and you can debug your fpga from inside out!However, there are a few problems.  The...

StrangeCPU #4. Microcode

Victor Yurkovsky May 13, 20137 comments

Sliding windows containing runs of microcode.

Table of Contents:

StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!

Victor Yurkovsky March 18, 201311 comments

Decoding instructions with a Sliding Window system.  0-Bit Sliding Register Windows.

Table of Contents:

StrangeCPU #2. Sliding Window Token Machines

Victor Yurkovsky March 5, 201313 comments

An in-depth exploration of Sliding Window Token Machines; ARM notes.

Table of Contents:

StrangeCPU #1. A new CPU

Victor Yurkovsky February 24, 20136 comments

Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.

Table of Contents:
  • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.

VGA Output in 7 Slices. Really.

Victor Yurkovsky September 25, 20122 comments

Ridiculous? Read on - I will show you how to generate VGA timing in seven XilinxR Spartan3R slices.Some time ago I needed to output video to a VGA monitor for my Apple ][ FPGA clone.  Obviously (I thought), VGA's been done before and all I had to do was find some Verilog code and drop it into my design.  As is often the case (with me anyway), the task proved to be very different from my imagined 'couple of hours to integrate the IP'.I found some example code for my board.  I...

FPGA Assemblers and Time Machines

Victor Yurkovsky September 2, 20121 comment

Flashback to 1986. A young man has a crazy idea - he wants to make a CPU all by himself. He is reading early Xilinx manuals cover to cover as if they were novels. Yes, you are quick - this is indeed a (mostly) true story about me and my dream, suddenly made possible by this new FPGA technology.

Sadly more than 20 years went by before my first CPU ran in a Xilinx FPGA. Why did it take so long? Every few years I set up the tools and every time I walked away, scared silly. As the years...

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