Research Assistantship (Fall, 2021) at Dept. of Computer Engineering, Hallym University, Korea

Started by jg.lee in comp.arch.fpga2 months ago

Research Assistantship (Fall, 2021) at the Graduate School, Dept. of Comput= er Engineering, Hallym University, Korea The [AI Accelerator...

Research Assistantship (Fall, 2021) at the Graduate School, Dept. of Comput= er Engineering, Hallym University, Korea The [AI Accelerator Design Lab] of the Hallym University seek to recruit pr= omising PhD and MSc or MSc-PhD research students. The selected students will conduct research in the [Hardware Implementation= of Deep Learning Algorithms] and [Deep Learning for Medical Applicat...


XILINX PCIe read of slow device

Started by David Binette in comp.arch.fpga3 months ago 20 replies

What is the correct way to handle a PCIE request to a slow device? I have a xilinx spartan 6 PCIe using Integrated Block for PCI...

What is the correct way to handle a PCIE request to a slow device? I have a xilinx spartan 6 PCIe using Integrated Block for PCI Express. The BAR memory map is decoded and some addresses map to fast ram, or local registers and these work OK, but some addresses map to slow devices.. like I2C or internal processes that need a few cycles to process before they can produce valid data to be ret...


Hi can anyone please tell me how to rectify this error

Started by Shanmukharao Muddada in comp.arch.fpga3 months ago 1 reply

Hi can anyone please tell me how to rectify this error ERROR:MapLib:30 - LOC constraint J17 on topsegF is invalid: No such site on the ...

Hi can anyone please tell me how to rectify this error ERROR:MapLib:30 - LOC constraint J17 on topsegF is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'. ERROR:MapLib:30 - LOC constraint H14 on topsegG is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'. ERROR:MapLib:30 - ...


Achronix?

Started by John Larkin in comp.arch.fpga3 months ago 2 replies

Has anyone used Achronix FPGAs?

Has anyone used Achronix FPGAs?


MachXO2 pin mismatch error

Started by Piotr Wyderski in comp.arch.fpga3 months ago 1 reply

Hi, I am trying to use a PMI ROM memory block in Lattice Diamond/VHDL: decoder_rom0 : pmi_rom generic map ( pmi_addr_width => ...

Hi, I am trying to use a PMI ROM memory block in Lattice Diamond/VHDL: decoder_rom0 : pmi_rom generic map ( pmi_addr_width => 3, pmi_data_width => decoder_rom_data'length, pmi_regmode => "noreg", pmi_gsr => "disable", pmi_resetmode => "sync", pmi_optimization => "area", pmi_init_file => "i2c_decoder_rom.mem", pmi_init_file_format => "binary" )


Fully Comitted to LVDS as Comparitors

Started by gnua...@gmail.com in comp.arch.fpga4 months ago

I working on a design where there will be some five sigma-delta ADCs and several specific level detect inputs each using an LVDS input pair as a...

I working on a design where there will be some five sigma-delta ADCs and several specific level detect inputs each using an LVDS input pair as a comparator. So I'm pretty committed to this working. The LVDS common mode range can work down to 50 mV and I"ll be testing that. I need to sense the voltage across a FET in an H bridge for over current or open load. The ADCs need to have decen...


Gowin - This Just Got Real

Started by gnua...@gmail.com in comp.arch.fpga5 months ago 5 replies

I've been watching the various FPGA startup companies and a couple have pro= duct available through mainstream distributors. The one I like the...

I've been watching the various FPGA startup companies and a couple have pro= duct available through mainstream distributors. The one I like the most is= Gowin because of the easy to use packages they offer, 100QFP, 88QFN, etc. = I'm working on a ventilator project and have specified a Gowin part for th= at for many of the same reasons that I would use it myself. =20 Now a customer has as...


Division Algorithms

Started by gnua...@gmail.com in comp.arch.fpga5 months ago 2 replies

I am looking for an algorithm to calculate a floating point divide. There a= re a number of options, but the one that is most clear to me and...

I am looking for an algorithm to calculate a floating point divide. There a= re a number of options, but the one that is most clear to me and easiest to= implement on the hardware I am designing seems to be the Newton=E2=80=93Ra= phson iterative method. I'm trying to understand how many iterations it wil= l take. The formula for that in the Wikipedia article assumes an initial es= timate for...


Achronix Semiconductor in Talks for Merger

Started by gnua...@gmail.com in comp.arch.fpga5 months ago 29 replies

An IPO of sorts really. They would merge with ACE Convergence Acquisition Corp NASDAQ: ACEV and this company would be seeking investors. ...

An IPO of sorts really. They would merge with ACE Convergence Acquisition Corp NASDAQ: ACEV and this company would be seeking investors. Achronix has been profitable, so this should be a good deal. I'm looking to buy in. -- Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209


Fixed Point Arithmetic

Started by gnua...@gmail.com in comp.arch.fpga5 months ago 9 replies

I don't know why I thought it would be easy. The arithmetic is not so hard by itself. But changing all the equations to normalize the variables...

I don't know why I thought it would be easy. The arithmetic is not so hard by itself. But changing all the equations to normalize the variables is not so easy. Then there is the issue of needing to assure the results don't grow out of range and I hadn't even given thought to the need for saturating arithmetic in some cases. I'm designing a fixed point math engine to do modera


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