MyHDL Presentation Examples

Christopher FeltonAugust 26, 2014

The last two years I presented at EELive.  The first year as an overview of MyHDL and a strong case why you should be using MyHDL as your hardware description language (HDL) [paper].  The second year was an introduction to three alternative HDLs (alt.hdl), including MyHDL.  I also presented at a regional Python conferene: pyohio.  At the Python conference I presented a brief introduciton to FPGAs and MyHDL

Generating examples for presentations can be challenging.  The examples need to be digestable but interesting.  Ideally they fit on a single slide and are readable.  The examples attempt to find a balance between brevity and complexity.  Because these examples are embedded in the presentation they can be lost over time and the presentations typically only include a snapshot of the example.  The following are the links to the examples, some of the examples are versions of earlier fpgarelated posts. 

2013 Examples:

  1. Strober [eelive ex.] 
  2. IIR Filter [eelive ex.] [fpgareleated]
  3. FPGA Hello World [pyohio ex.][fpgareleated]

2014 Examples:

Note, the last two were not actually presented but were included in the repo as larger examples (i.e. not digestable in a single slide).

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