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VGA signal generation

Started by n_gorshenin 7 years ago1 replylatest reply 7 years ago149 views
Hello! My task is creation of real-time system which can draw simple graphics figure on monitor (VGA) when the system register input pulse. The main difficulty is...

APB Bridge

Started by RADOVID5 7 years ago2 replieslatest reply 7 years ago84 views
I am Jyotirmaya . Could anyone help me regarding how many FSMs are required for the APB Bridge slave ?

SSB Demodulation

Started by b2508 8 years ago13 replieslatest reply 7 years ago2068 views
Hi all,I am trying to do the USB SSB Demodulation in FPGA.From what I understood, SSB demodulation is obtained by having m(t) - baseband message signal of frequency...

manipulation of two dimensional matrices in VHDL

Started by sanghamitra6 8 years ago13 replieslatest reply 8 years ago419 views
Two dimensional matrices can be handled in VHDL if we directly enter the elements of the matrix in the VHDL module. But if the matrix is very large typing all the...

Mealy or Moore? none and not even state machine

Started by kaz 8 years ago11 replieslatest reply 8 years ago354 views
I used to work in the old days of digital design and was familiar with Moore and Mealy style of state machine methodology. It was an attractive University topic...

Glitch on Articx7

Started by joshuablanco 8 years ago3 replieslatest reply 8 years ago93 views
Hi, i need to watch a "glitch" in a simple combinational circuit, i'm simulating in ISE_14, but i don't achieve watch it, i know that i need to understand three...

myStorm - A $30 ICE40 / ARM M3 Dev -Board

Started by monsonite 8 years ago1 replylatest reply 8 years ago2858 views
I am pleased to announce myStorm - a new open source 75mm x75mm dev-board with an ICE40HX4K and an STM32F103 Cortex M3.  The FPGA also has 512Kx16 of fast 10nS...
Hello,I am beginner in Spartan 3A DSP Video Starter Kit. I wish to implement an algorithm which takes Composite Video input at 640x480@25Hz (PAL720) and outputs...

Write the embedded software and the design FPGA code? Just because you can doesn't mean you should!

Started by paulkushner 8 years ago2 replieslatest reply 8 years ago133 views
As an FPGA engineer who also writes C I am increasingly finding myself in the situation of having to create both the FPGA design and the software to interface...

Dynamic reconfiguration of Xilinx MMCM with fine phase shift enabled

Started by paulkushner 8 years ago4 replieslatest reply 8 years ago1405 views
Hello,I'm using a Zync part (Xilinx Series-7) and trying to use the dynamic reconfiguration of the MMCM clock module whilst keeping the fine phase shift control...

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