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Forums Update, Tips and Tricks - Please Read!

It's been a few months since the launch of the new forums. Here are a few thoughts.
The thumbsup and beer buttons
If there is one thing that could have a...
FPGA SoC for Custom Flight Controller

Hello everyone,I’m currently working on developing a custom flight controller for small UAV's, and I’d like some advice on selecting the right SoC FPGA for the...
A few months ago, this community tackled the first FPGA FAQ titled When (and why) is it a good idea to use an FPGA in your embedded system design?. Your contributions...
Variable IIR-Filter Coefficient calculation in frequency domain

Hello,Currently im evaluating the usefulness of frequency domain filtering in FPGA for one of our projects. Im stuck with a problem that my limited knowledge of...
Adding Wi-Fi capability to a Pynq Z1 FPGA board by interfacing a Wi-Fi module

I own a Pynq Z1 FPGA board without built-in Wi-Fi. How can I connect a Wi-Fi module, specifically using GPIO or communication interfaces like UART, SPI, or I2C?...
dynamically configure Xilinx FFT IP core

Hi all,My design uses Xilinx's FFT LogiCORE IP which I use to do FFT of transform length 128 points. I configure the IP core in Vivado GUI, instantiate in my code...
Is N-body simulation in O(n) time possible?

Hi! My name is Mason. I've recently been messing around with FPGAs, and I think I found a way to do N-body simulation in O(n) time. First, some quick background....
Hi All, I am starting to learn Verilog in order to program FPGAs. I have a project where I need to take three digital signals coming from three hall sensors on...
LZW or BWC Compression cores for FPGAs

Hello,Can anyone recommend RTL level cores for LZW or BWC compression/decompresison engines? Thank you.Best regards,Sanjay
Implementing a folded FIR on FPGA

Hello there,This is a follow up video about FIR filter design on FPGA. It goes into the implementation of a folded FIR as well as some aspects the design.You can...
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