Xilinx FIR Compiler Fractional Rate Converter

Started by ismailt42 1 year ago1 replylatest reply 1 year ago52 views
Hello, I have designed a FIR Fractional Rate Converter Filter by using FIR Compiler. The purpose of the design convert 20MHz(20M samples) to 20.48MHz(20.48M samples)...

Polyphase Filter Bank channelizer issue

Started by epetragl 1 year ago5 replieslatest reply 1 year ago414 views
Hello, I am currently studying the implementation of a Polyphase Filter Bank channelizer designed by Xilinx in its XAPP1161. The architecture is composed by a single...

UART communication For Nexys A7-100t

Started by MCU231 1 year ago1 replylatest reply 1 year ago215 views
Hello,I'm new to UART for FPGA and recently I tried a demo project that I found at: problem is using RxD_data_ready...

Zedboard and the ov7670 settings

Started by shlomishab 1 year ago92 views
I've been working on a video streaming project using a zedboard and the ov7670 camera. My project is based on this one (capture and vga .vhd files):

Attempting to implement UART - Unexpected Behaviour

Started by fayalalebrun 1 year ago9 replieslatest reply 1 year ago119 views
I have been trying to implement a UART in order to communicate between my Lattice MachXO3D board and my computer. At the moment I am attempting to implement the...

Modelsim Error: (vsim-3555) Identifier is not a unit name for the physical type

Started by Echoonezero 1 year ago5 replieslatest reply 1 year ago29 views
Hello,I am a newbie in verifying complex FPGA designs.  In my testbench, I am reading the test vectors from  a text file and assigning them to the input ports...

Will this FPGA be suitable for DSP purposes?

Started by corn1996 1 year ago8 replieslatest reply 1 year ago249 views
Hey guys! My masters degree thesis is digital lock-in amplifier. I want to make it on an FPGA to learn this piece of hardware. Basically I have a budget of 220€...

Quartus Prime Licensing

Started by Echoonezero 1 year ago1 replylatest reply 1 year ago69 views
Hello,I have the following questions:1. A Quartus Prime Lite version is sufficient for my FPGA design. Can I use only the Lite version in my company for commercial...

Libero SmartFusion 2 Pinout Chart

Started by cwible 1 year ago35 views
Hi everyone, I am trying to learn how to use the SmartFusion 2 Maker Kit for a research project. Right now I am trying to simply flash an LED but I cant find which...

Clock domain crossing

Started by vpsampath 1 year ago154 views
Constraints are essential when developing a new design. The constraints set up are the environmental, clock, test and power boundaries the designers must keep themselves...

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