Processing Gain at output of ADC

Started by rathnakarreddy 5 months ago2 replieslatest reply 5 months ago46 views
With adequate filtering after AD conversion, the SNR is calculated as,SNR=6.02*N+1.76+10*log(fs/(2*BW));N-> No: of ADC bitsThe term 10log(fs/2*BW) is referred...

How to avoid Blocking Statement in Verilog

Started by rathnakarreddy 5 months ago1 replylatest reply 5 months ago47 views
Hi,I have a matlab code and I have to convert it to verilog.The matlab code is as follows:/****************************************************************/clc;clear...

ADC SNR and Processing Gain

Started by rathnakarreddy 5 months ago3 replieslatest reply 5 months ago37 views
Hi,with reference to the following article, have understood that decimating doesn't destroy the processing...

How to make sure clock is from the main clock tree?

Started by andy92806 6 months ago6 replieslatest reply 5 months ago29 views
Let's say you have a module that needs a clock like this:module need_clk(i_clk, .....) input i_clk;. .......endmoduleAt the top level, you then have a statement...

Block Floating Point in FFT.

Started by matiasgg 5 months ago15 replieslatest reply 5 months ago146 views
Hi. I've seen other post like this on the forum, but it is still not clear to me so I will ask. Sorry if it seems like a repost.I'm creating an FFT/IFFT in verilog...

Does anyone have experience in RFSoCs?

Started by amitjonak 6 months ago10 replieslatest reply 5 months ago114 views
Hello everyone!Our lab has bought the Xilinx ZCU1275 RFSoC and we, being Masters students are finding it extremely difficult to learn how to control the board. Since...

How to Interface LCD Text Module to FPGA

Started by johnkk89 6 months ago35 views
Hi, I'm taking an electronics class for college and I am very behind because of some family issues that I've been dealing with. I need to pass this class to graduate. I...

Block diagram software

Started by rnp 6 months ago11 replieslatest reply 6 months ago167 views
Hello everybody,I am searching for a WYSIWYG software to draw, from complex to simple, block diagrams for documenting my personal projects. So far I am using CircuiTikz...

OT: Laughing in the Face of Adversity

Started by stephaneb 7 months ago14 replieslatest reply 6 months ago284 views
Humor helps us take back control and to connect - two things we have lost in our fight against the pandemic. Feel free to share your best finds. they're playing...

Bob Jenkins Hash on FPGA

Started by Bobby29999 6 months ago5 replieslatest reply 6 months ago72 views
Hi,I am working on an algorithm which uses the following Bob Jenkins Hash. Below are the reference of Bob Jenkins:

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