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Inverse Transform Sampling method on FPGA

Started by Bobby29999 2 years ago3 replieslatest reply 2 years ago46 views
Hi,I am working on pseudo random number generation topic. To be precise,  Inverse Transform Sampling method , i.e., a method for generating sample numbers...

Lattice FPGA timing constraint help

Started by dave94024 2 years ago4 replieslatest reply 2 years ago126 views
I have an application using a Lattice UltraPlus FPGA which is mostly working except for some marginal behavior.  I'm pretty sure it's due to timing constraint issues...

Covid-19 Stories

Started by stephaneb 2 years ago21 replieslatest reply 2 years ago539 views
How about we share with each others the impact that the current pandemic is having on our lives & work?  I will start. First, I am located in Canada, where...

QSPI Slave controller IP core

Started by sachinwannabe 2 years ago2 replieslatest reply 2 years ago133 views
Hi,I can't seem to find a QSPI slave IP core. Any pointers? My application needs to interface with a QSPI master interface on a processor.Thanks
I want to use a example from the Intel FPGA Monitor Program 18.1 and use it in Quartus 18.1. It is the video example, which creates a blue box on the HDMI...

Is this possible with an FPGA?

Started by Joe3502 2 years ago8 replieslatest reply 2 years ago75 views
Hi All, I am starting to learn Verilog in order to program FPGAs. I have a project where I need to take three digital signals coming from three hall sensors on...

Final Push and Could use your Help

Started by stephaneb 2 years ago201 views
Hello,by now, I suspect that most of you are already signed-up for the upcoming Embedded Online Conference that I am currently organizing with Jacob Beningo (@beningjw).I...

UDP or TCP/IP FPGA solution for max streaming rate of 640 Mbps

Started by jmca 3 years ago6 replieslatest reply 2 years ago228 views
Hi,I am an FPGA engineer in charge of developing a test application that must offload a continuous test data stream between host PC and a test hardware. I do not...

New Embedded Online Conference website, need your help testing it.

Started by stephaneb 2 years ago15 replieslatest reply 2 years ago215 views
Together with my friend Jacob Beningo, we have been working hard lately on putting together a platform to hold online conferences:https://www.embeddedonlineconference.comBefore...

Running Sum filter

Started by Adira 2 years ago17 replieslatest reply 2 years ago351 views
Hello,I implemented running sum filter In FPGA.  Input width(IW) is 8 and the log(based two) of the maximum number of averages(LGMEM) is 14. The output/accumulator...

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