HDL to Schematic Reporting

Started by Sanram 8 months ago5 replieslatest reply 8 months ago84 views
I am looking at a tool (or combination of tools) to perform the following. Please advise.1) Read Verilog/VHDL RTL input code and convert it to technology independent...

Mux versus internal high impledance

Started by prashantpd 9 months ago5 replieslatest reply 8 months ago59 views
Hi, I have been an FPGA designer for more than a decade now and tutor a class on FPGA design at University presently. In all these years, I have had two ways of...

Is an ACM subscription worthwhile?

Started by david_days 9 months ago2 replieslatest reply 9 months ago41 views
This morning on my codeproject.com feed, I got a link to an ACM article about C.  But what caught my eye was that the cover of the edition had an article about...

Writing 16-bit data to bram

Started by gundamz2001 9 months ago6 replieslatest reply 9 months ago109 views
Hello,I am currently working on a Xilinx development board that has PowerPC and virtex 5. I used Xilinx core generator to instantiate a bram with data width size...

Xilinx IPs for DFT, FFT, LTE_FFT

Started by kaz 9 months ago4 replieslatest reply 9 months ago62 views
Just started looking into Xilinx Fourier transform ip and found out that there are three versions:DFT: apparently useful for any resolutionFFT: power of 2 resolution,...

Which FPGA kit to start with in 2018?

Started by david_days 10 months ago12 replieslatest reply 9 months ago4815 views
Hello, All!I'm a professional software developer who is trying to make the jump into FPGA for fun, learning, and my own research purposes.  I've been studying the...

Completely OT: Your Favorite 'Relatively Unknown' Music

Started by stephaneb 10 months ago13 replieslatest reply 9 months ago423 views
So far, we've been very good at staying on-topic in the *Related sites forums.  Today, let me break the trend and start a completely off-topic (#OT) thread that...

Aurora 8B10B for Virtex-4 FX FPGA Generation Failed Using ISE 14.7

Started by Multan007 10 months ago2 replieslatest reply 9 months ago43 views
I am trying to generate the Aurora 8B10B core for Virtex-4 FPGA using ISE 14.7 in Windows 7  (64 bit) OS based on the procedure presented in LogiCore IP guide....

Best FPGA for Harvard Architecture

Started by rsdivekar 10 months ago3 replieslatest reply 10 months ago64 views
(a) I am prototyping a new CPU (Harvard Architecture) with separate 1MB  program memory and 1MB  data memory. Which Xilinx FPGA board would be the best choice...

transfert data from host pc to target fpga using DMA

Started by assaad 10 months ago6 replieslatest reply 10 months ago88 views
I have 2 image files imported by ENVI tool (png or raster file), and they are stored in my hard disk, I want to transfer this data from host PC to target FPGA using...

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